I/O Control Registers - Tandy 26-3334 Service Manual

1.4 I/O Control Registers
FFOO
-
FF03 PIA
IC5
FFOO:
BIT = KEYBOARD ROW
1
KEYBOARD ROW
2
KEYBOARD ROW
3
KEYBOARD ROW
4
KEYBOARD ROW
5
KEYBOARD ROW
6
KEYBOARD ROW
7
JOYSTICK COMPARISON
INPUT
FF01:
BIT
1
BIT
2
BIT
3
BIT
4
BIT
5
BIT
6
BIT
7
BIT
BIT
1
and right joystick switch
1
and Left joystick switch
1
and right joystick switch
2
and Left joystick switch
2
Control
of
HSYNC
(63.5us)
Interrupt
Control
of
Interrupt
Polarity
BIT
BIT
BIT
BIT
BIT
BIT
Normally
1:
SEL
1:
1
Always
1
Always
Not used
Horizontal
sync interrupt flag
f
= IRQ*
to
CPU Disabled
t
1
= IRQ* to
CPU Enabled
(0
= Flag
set on the
falling edge of HS
1
=
Flag set on the
rising edge
of HS
=
Changes FFOO
to the
data direction register
LSB of
the two
analog MUX select lines
FF02:
BIT = KEYBOARD COLUMN
1
KEYBOARD COLUMN
2
KEYBOARD COLUMN
3
KEYBOARD COLUMN
4
KEYBOARD COLUMN
5
KEYBOARD COLUMN
6
BIT
BIT
BIT
BIT
BIT
BIT
BIT
KEYBOARD COLUMN
7
/RAM SIZE OUTPUT
KEYBOARD COLUMN
8
FF03:
CO =
IRQ*
to
CPU Disabled
1
1
=
IRQ*
to
CPU Enabled
/"0 =
sets flag on falling edge FS
u
-
BIT Control
of
VSYNC (16.667ms)
Interrupt
BIT
1
Control
of
Interrupt Polarity
sets flag on rising edge FS
BIT
2
= NORMALLY
1;
=
changes FF02
to the data direction register
BIT
3
= SEL
2:
MSB
of the two
analog MUX select lines
BIT
4
=
1
Always
BIT
5
=
1
Always
BIT
6
=
Not used
BIT
7
= Field
sync interrupt
flag
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