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The data from
the
MMU
is
then
used
as
the
upper
6
address lines (A13
-
A18)
for
memory
access,
according
to the
following:
TR
A15
A14
A13
(Address range)
MMU location address
XOOOO
-
X1FFF
FFAO
1
X2000
-
X3FFF
FFA1
1
X4000
-
X5FFF
FFA2
1
1
X6000
-
X7FFF
FFA3
1
X8000
-
X9FFF
FFA4
1
1
XA000
-
XBFFF
FFA5
1
1
XC000
-
XDFFF
FFA6
1
1
1
XEOOO
-
XFFFF
FFA7
XOOOO
-
X1FFF
FFA8
1
X2000
-
X3FFF
FFA9
1
X4000
-
X5FFF
FFAA
1
1
X6000
-
X7FFF
FFAB
1
X8000
-
X9FFF
FFAC
1
1
XA000
-
XBFFF
FFAD
1
1
XC000
-
XDFFF
FFAE
1
1
1
XEOOO
-
XFFFF
FFAF
It
is
important
to
note
that,
in
order
for the
MMU
to
function, the CoCo bit
of
FF90 must
be
cleared, and
the
M/P bit
of
FF90 must
be set. Prior to
doing
this,
the
desired addressing information
for
each segment must be loaded into
the
designated
set of
task registers. For example,
if
a
standard 64K map
is
desired
in the
top of
512K
RAM,
with
the
TR bit
set
to 0,
the
following values should
be
pre-loaded into
the
MMU:
MMU Location
address
Data
(Hex)
Data (Bin)
Address range
FFAO
38
111000
70000
-
71FFF
FFA1
39
111001
72000
-
73FFF
FFA2
3A
111010
74000
-
75FFF
FFA3
3B
111011
76000
-
77FFF
FFA4
3C
111100
78000
-
79FFF
FFA5
3D
111101
7A000
-
7BFFF
FFA6
3E
111
110
7CO0O
-
7DFFF
FFA7
3F
111111
7E000
-
7FFFF
NOTE;
Data loaded can
be
selected freely within
the
range of $00 - $3F.
-16-
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