Pal Encoder (Pal Version Only) - Tandy 26-3334 Service Manual

5.4 PAL
ENCODER
(PAL Version Only)
PAL version uses IC101, IC102 and
IC103
to
encode
the
RGB signals
to
the PAL signal. The
majority
of the
work
is
performed
by IC103,
the
RGB
to PAL ENCODER chip. This chip
is
designed
to generate
a
composite
video signal from baseband
red, blue,
green and composite sync input from
sync mixer
QI1
and D15
-
D17. The chip
contains color subcarrier oscillator,
voltage controlled
90 degrees phase
shifter, two
double-sideband
suppressed carrier chroma modulators,
RGB input matrix, and blanking level
clamps
In the
PAL version,
an
extra
voltage-controlled crystal oscillator
is
needed
for the
PAL color burst
frequency of 4.433618 MHz. For
this
purpose, the internal oscillator
circuit
of the IC103
is
used.
If the
oscillator does
not
synchronize with
the
master
oscillator, an apparent motion will
exist whenever
a
color transition
occurs.
IC101
is a
programmable divider
and
operates
in a
divisor
of
71.
The
output from the divider
is
connected
to the programmable divider part of
IC102
where
a
divisor
of 4
is
used
to
complete
the count-down
to
15.611
kHz. IC102 also
contains
a
phase
comparator
part, and
it
compares
this
divided
15.611 kHz
with
the HSYNC
signal which
is
counted down
to
15.611 kHz from
the master oscillator
in IC6. The phase
comparator
then
generates
a
control voltage
in
proportion
to the phase
and frequency
difference between
these
2
signals of
15.611 kHz and output
it at pin
13.
This control voltage
is
passed
through
a simple R-C low pass filter
and used
to
control
a
varactor diode
D101. The capacitance of
the
varactor
is
changed
to tune
the 4.433618 MHz
oscillator
by varying
the
control
voltage. This tuning allows
the two
oscillators
to be
synchronized
at
any
time except during reset
or power-on.
This synchronization problem
is
solved
by slightly shifting
of the
master oscillator frequency
and
the
addition of
a
phase-locked-loop
circuit. The master crystal
oscillator frequency
of the
PAL
version
is
28.475 MHz. This allows
the two oscillator
to
be divided down
to the horizontal frequency
of 15.611
kHz and
phase-locked
at this
frequency.
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