Mc68B09E Pin Assignments - Tandy 26-3334 Service Manual

Figure 5-2 shows the
pinouts of
IC1,
the
68B09E
CPU. Note that there are
sixteen address lines
(AO
through
A15). These address lines are output
from the CPU and are used
to select
one
of 65,536 different memory
locations. The memory and I/O devices
must be wired
to accept the correct
combination
of highs and lows on
the
address lines. The order
of the
devices and how they respond
to
the
different lines are called the memory
map.
The CPU has eight data lines
(DO
-D7
)
.
These data lines are
bidirectional and are used
by the
processor
to
both route data
to
and
retrieve data from memory
or I/O
devices through
Bus
Transceiver 74LS
245 (IC3).
The remaining lines on
the
CPU are
used for control functions, both
input control and output control. Of
course, the Vcc pin
is
the power
input line
to the
CPU and
the GND
line
is
the
return reference
for
both
power and signal. The
E
and Q lines
are
the
clock inputs
to
the CPU.
These clock signals must
be present
for the CPU
to
function.
In the
Color
Computer
3,
these signals are
provided by the advanced color video
chip (IC6) and are
50%
duty cycle
clocks
at a
frequency of 0.89
MHz or
1.78 MHz. As shown in
Figure
5-3, Q
is a
quadrature clock signal which
leads
E by 90 degrees.
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Figure 5-2. MC68B09E Pin Assignments
-31-