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Figure 2.5-/*(a)
shows the patching to provide an operati-onal
amplifier
that is capable of integrating
with respect to tjme.
Figure 2.5-/r$)
illustrates
a simplified
schematic for an arnplifier
patched as aI] integrator.
The computer symbol for an integrator
is
sholnr in Figure 2.5-4G).
Figure 2.5-5 is an expanded schemati-c of the integrator
anpl-i-
fier.
In addition
to the terminations
inter"connected by the two
four - connector bottle
plugs,
certain
ci::cuits
are brougtrt out to
the patchlng bloek for additional
control
of the integrators.
These
include
the Compute and Reset relay
coils
and the compute hold antl
reset buses.
Normaly these terminations
are corurected, aS shor'rn j-n
Figu::e 2.5-l+; hor,rever, by cross patching
(nofa bus to reset relay,
etc.)
the integrator
can be used as a track and hold unit.
An additional
feature
is the free tertnination
of four integrat-
ing capacitorsi
1d,
.1 dr.o1
uJl and .oo1 uF.
They ar-e correspond.-
ing to the integrating
gains of 1, 10, 1OO and 1000. the operator
has
the choice of the integrating
gain both in RT (real time operation)
and RO (repetitive
operation),
connecting the selected capacitors to
RT ancl RO tenninals
on the patch panel.
The two holes designated R
and C of the MM area of the Dual Integrator
are the trunk ljnes
to
control
the integrator
mod,e by the digit'al
logie
elements which will
be mounted on the Control Console CS-508.
r
:
&
-
t
r
r
r
r
r
r
r
t
r
t
t
f
t
t
I
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