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LVDS Flat Panel Signals
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
LVDS_PPEN
111
O CMOS
3.3V/3.3V
LVDS_BLEN
112
O CMOS
3.3V/3.3V
LVDS_BLT_CTRL/GP_PWM_OUT0
123
O CMOS
3.3V/3.3V
LVDS_A0+
99
O LVDS
LVDS
LVDS_A0-
101
LVDS_A1+
103
O LVDS
LVDS
LVDS_A1-
105
LVDS_A2+
107
O LVDS
LVDS
LVDS_A2-
109
LVDS_A3+
113
O LVDS
LVDS
LVDS_A3-
115
LVDS_A_CLK+
119
O LVDS
LVDS
LVDS_A_CLK-
121
LVDS_B0+
100
O LVDS
LVDS
LVDS_B0-
102
LVDS_B1+
104
O LVDS
LVDS
LVDS_B1-
106
LVDS_B2+
108
O LVDS
LVDS
LVDS_B2-
110
LVDS_B3+
114
O LVDS
LVDS
LVDS_B3-
112
LVDS_B_CLK+
120
O LVDS
LVDS
LVDS_B_CLK-
122
LVDS_DID_CLK/GP_I2C_CLK
127
I/O OD CMOS
3.3V/3.3V
LVDS_DID_DAT/GP_I2C_DAT
125
I/O OD CMOS
3.3V/3.3V
LVDS_BLC_CLK
128
I/O OD CMOS
3.3V/3.3V
LVDS_BLC_DAT
126
I/O OD CMOS
3.3V/3.3V
HDMI Interface Signals
Signal
Pin#
Pin Type
Pwr Rail /Tolerance
TMDS_CLK-
133
O TMDS
TMDS
TMDS_CLK+
131
TMDS_LANE0-
145
O TMDS
TMDS
TMDS_LANE0+
143
TMDS_LANE1-
139
O TMDS
TMDS
TMDS_LANE1+
137
TMDS_LANE2-
151
O TMDS
TMDS
TMDS_LANE2+
149
HDMI_CTRL_CLK (SDVO_CTRL_CLK)
152
I/O OD CMOS
3.3V/3.3V
HDMI_CTRL_DAT (SDVO_CTRL_DAT)
150
I/O OD CMOS
3.3V/3.3V
HDMI_HPD#
153
I CMOS
3.3V/3.3V
Chapter 2 Hardware Installation
Chapter 2
DFI-FS700 Series
Carrier Board
Connect to enable control of LVDS panel power circuit
Connect to enable control of LVDS panel backlight powe
circuit.
Connect to brightness control of LVDS panel backlight power
circuit.
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
Connect to LVDS connector
PU 4.7K to 3.3V
Connect to DDC clock of LVDS panel
PU 4.7K to 3.3V
Connect to DDC data of LVDS panel
PU 4.7K to 3.3V
PU 4.7K to 3.3V
DFI-FS700 Series
Carrier Board
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
Connect AC Coupling Capacitors 0.1uF to Device
PU 4.7K to 3.3V
PU 4.7K to 3.3V
PD 1M and Connect to device Hot Plug Detect
Description
Controls panel power enable.
Controls panel Backlight enable.
Primary functionality is to control the panel backlight brightness via pulse width modulation (PWM).
When not in use for this primary purpose it can be used as General Purpose PWM Output.
LVDS Channel A differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100 terminations across the pairs at the destination. These
terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board
LVDS Channel A differential clock
LVDS Channel B differential pairs
Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-,
LVDS_B_CK+/-) shall have 100 terminations across the pairs at the destination. These
terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer
on-board
LVDS Channel B differential clock
Primary functionality is DisplayID DDC clock line used for LVDS flat panel detection. If primary functionality is not used it can be as General Purpose I²C bus clock line.
Primary functionality DisplayID DDC data line used for LVDS flat panel detection. If primary functionality is not used it can be as General Purpose I²C bus data line.
Control clock signal for external SSC clock chip.
Control data signal for external SSC clock chip.
Description
TMDS differential pair clock lines.
TMDS differential pair lines lane 0.
TMDS differential pair lines lane 1.
TMDS differential pair lines lane 2.
DDC based control signal (clock) for HDMI device.
Note: Level shifters must be implemented on the carrier board for this signal in order to be compliant with the HDMI Specification.
DDC based control signal (data) for HDMI device.
Note: Level shifters must be implemented on the carrier board for this signal in order to be compliant with the HDMI Specification
Hot plug detection signal that serves as an interrupt request.
14
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