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Motorola M6800 Specification Page 15

Motorola microcomputer data specification.
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The MPU requires a two phase symmetrical, TTL compatible,
nonoverlapping clock. During the first phase of the clock (Ø l high) an
address will be placed on the address bus by the MPU. During the second phase
of the clock (Ø 2 high), the bidirectional data bus will be active. The first
byte of an instruction enters the MPU and is transferred into an internal
instruction register and decoded by the MPU. The MPU will then contain the
information needed to read in an additional one or two bytes of program is
necessary. Once the entire instruction is read into the MPU (one, two or
three bytes) the instruction is then executed. The MPU then reads in the next
sequential byte in the program and places it again in the instruction
register. The program will sequentially be executed in this manner unless a
branch or jump instruction changes the value of the program counter. If this
occurs, the next instruction to be executed is determined by the new program
counter value.
If an interrupt or reset occurs during this process, the program
counter value will also be changed. The new program counter value is
determined by the highest eight memory locations that are reserved for reset
and interrupt vectors.
In the case of interrupt, the stack pointer is used to store the
contents of the internal registers necessary to return to the program
location prior to the interrupt. This happens when the interrupt program
exits by an RTI (Return from interrupt instruction). Similarly, the stack
pointer is used to store the program counter value when a JSR (Jump to
Subroutine) or BSR (Branch to Subroutine) instruction occurs. The program
counter returns to its original value when an RTS (Return from Subroutine)
instruction occurs. The stack pointer value is set by an LDS (Load Stack
Pointer) instruction.


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