Contents of the MPU registers PC, 1X, ACCA, ACCB and CC are stored in
RAM at the address indicated by the stack pointer in descending location
(7 bytes in all).
The IRQ mask (bit I = 1) is set.
Data at FFFA gets loaded into PCH.
Data at FFFB gets loaded into PCL.
PC contents go out on address bus during Ø 1 .
Contents of cell addressed enters instruction register during Ø 2 and is
decoded as first instruction of SWI subroutine.
If it is a more than one byte instruction, additional bytes enter MPU
for execution. If not, go to next step.
After execution, Step 6 is repeated for subsequent instructions. This
loop is repeated until the instruction "RTI" is executed.