Philips FTL2.1E Service Manual page 144

EN 144 9. FTL2.1E, FTL2.2E
9.11.9 Diagram J, P87LPC760BDH (IC7075)
BLOCK DIAGRAM
CRYSTAL OR
RESONATOR
PIN CONFIGURATION
Circuit Descriptions, Abbreviation List, and IC Data Sheets
INTERNAL BUS
1 KBYTE
CODE EPROM
128 BYTE
DATA RAM
PORT 2
CONFIGURABLE I/OS
PORT 1
CONFIGURABLE I/OS
PORT 0
CONFIGURABLE I/OS
KEYPAD
INTERRUPT
CONFIGURABLE
OSCILLATOR
OSCILLATOR
1
P1.7
2
RST/P1.5
3
V
SS
4
X1/P2.1
5
X2/CLKOUT/P2.0
6
SDA/INT0/P1.3
7
SCL/T0/P1.2
Figure 9-19 Internal block diagram and pin configuration
ACCELERATED
80C51 CPU
ON-CHIP
RC
14
P0.3/CIN1B
13
P0.4/CIN1A
12
P0.5/CMPREF
11
V
DD
10
P0.6/CMP1
9
P1.0/TxD
8
P1.1/RxD
UART
2
I C
TIMER 0, 1
WATCHDOG TIMER
AND OSCILLATOR
ANALOG
COMPARATOR
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
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