Philips FTL2.1E Service Manual page 141

Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.11.6 Diagram B6B, MAS3528E (IC7A30)
S/PDIF in
(Dolby Digital,
MPEG-1 Layer-2, PCM)
Serial inputs
Serial Control
VDD
I2CD
I2CC
POR
TE
6 5 4 3 2
AVSS 7
AVDD 8
XTI 9
XTO 10
N.C. 11
MAS 3528E
N.C. 12
CLKO 13
SOD1 14
SOD2 15
SOD3 16
SPDIFOUT 17
18 19 20 21 22 23 24 25 26 27 28
PI4
SIC
SII
SID
XVSS
MAS 3528E
S/PDIF
in
Serial In
RISC DSP Core
2
I S
2
Clock
I S
CLKO
18.432 MHz
Figure 9-16 Internal block diagram and pin configuration
FTL2.1E, FTL2.2E
VSS
SYNC
EOD
RTR
RTW
SPDI2
1 44 43 42 41 40
39 SPREF
38 SPDI
37 PR
36 PCS
35 PI19
34 PI18
33 PI17
32 PI16
31 PI15
30 PI14
29 PI13
PI12
SOD
SOI
SOC
PI8
XVDD
S/PDIF
out
Serial Out
2
I S
PIO
XTO XTI
9. EN 141
S/PDIF out
I2S output
additional
/9+3/ inputs and outputs
E_14620_147.eps
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