Sharp LC-37XD1E Service Manual page 66

Hide thumbs Also See for LC-37XD1E:
Table of Contents

Advertisement

LC-37XD1E/RU
78
UVOUT4/
INTR
79
VDDP6
80
VSSP6
81
UVOUT3
82
UVOUT2
83
UVOUT1
84
UVOUT0
85
VDDD4
86
VSSD4
87
VDDA0
88
ASVMOUT
89
VSSA0
90
VDDA1
91
AUOUT
92
VSSA1
93
VDDA2
94
AYOUT
95
VSSA2
96
VDDA3
97
AVOUT
98
VSSA3
99
VSSA4
100
VDDA4
101
VSSD5
102
VDDD5
103
NC
104
NC
105
SCL
106
SDA
107
NC
108
NC
109
VSSP7
110
VDDP7
111
TMS
112
NC
TDO/
113
SVMOFF
114
TDI
115
TCLK
116
INTR
117
656I02
118
656I12
119
656I22
120
656I32
121
656I42
122
656I52
O
Tristate ( ENITUE=0)
Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)
Digital (chrominance/red) output (ENITUE=1 and SELRB=1)
Interrupt signal output from µC (CPUIRQ=5)
Static 0 (CPUIRQ=6)
Static 1 (CPUIRQ=7)
S
Supply digital pad (3.3 V)
S
Supply digital pad (0 V)
Tristate (ENITUE=0)
O
Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)
Digital (chrominance/red) output (ENITUE=1 and SELRB=1)
Tristate (ENITUE=0)
O
Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)
Digital (chrominance/red) output (ENITUE=1 and SELRB=1)
Tristate (ENITUE=0)
O
Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)
Digital (chrominance/red) output (ENITUE=1 and SELRB=1)
Tristate (ENITUE=0)
O
Digital (chrominance/blue) output (ENITUE=1 and SELRB=0)
Digital (chrominance/red) output (ENITUE=1 and SELRB=1)
S
Supply digital core (1.8 V)
S
Supply digital core (0 V)
S
Supply analog DAC SVM (3.3 V)
Middle level (STANDBY=1)
Analog SVM output (ACTFBL=0 and STANDBY=1)
O
Analog SVM output (control by SVMOFF possible)
(ACTFBL=1 and STANDBY=0)
S
Supply analog DAC SVM (0 V)
S
Supply analog DAC B/U (3.3 V)
Middle level (STANDBY=0)
O
Chrominance output (STANBY=1)
S
Supply analog DAC B/U (0 V)
S
Supply analog DAC G/Y (3.3 V)
Middle level (STANDBY=0)
O
Luminance output (STANDBY=1)
S
Supply analog DAC G/Y (0 V)
S
Supply analog DAC R/V (3.3 V)
Middle level (STANDBY=0)
O
Chrominance output (STANDBY=1)
S
Supply analog DAC R/V (0 V)
S
Supply analog band gap (0 V)
S
Supply analog band gap (3.3 V)
S
Supply digital core (0 V)
S
Supply digital core (1.8 V)
-
No Connection
-
No Connection
I/O
I2C bus clock
I/O
I2C bus data
-
No Connection
-
No Connection
S
Supply digital pad (0 V)
S
Supply digital pad (3.3 V)
I
Test mode select (3.3 V)
-
No Connection
Test data out (ACTSVMOFF=1)
O/I
SVM input signal (ACTSVMOFF=0)
I
Test data in (0V)
I
Test clock (3.3 V)
Interrupt signal
Static 0 (CPUIRQ2=00)
O
Static 1 (CPUIRQ2=01)
Interrupt signal output from µC (CPUIRQ2= 1x)
I
Digital (luminance) input [LSB]
I
Digital (luminance) input
I
Digital (luminance) input
I
Digital (luminance) input
I
Digital (luminance) input
I
Digital (luminance) input
5 – 12

Advertisement

Table of Contents
loading

Table of Contents