Sony hcd-fc7 Service Manual page 84

HCD-FC7
QQ
3 7 63 1515 0
Pin No. Pin Name
101 MD30
102 MD31
103 GND25
104 VDD25
105 VCLK
106 I2C_CTRL
107 VS
108 I/P SW
109 GPIO1 (5)
110 GPIO1 (4)
111 VDDP
112 GNDP
113 GPIO1 (3)
114 GPIO1 (2)
115 GPIO1 (1)
116 HIRQ2_
117 VDAC_4B
118 VDAC_VDD4
119 VDAC_4
120 VDAC_3B
121 VDAC_VDD3
122 VDAC_3
TE
L 13942296513
123 VDAC_2B
124 VDAC_VDD2
125 VDAC_2
126 VDAC_1B
127 VDAC_VDD1
128 VDAC_1
129 VDAC_0B
130 VDAC_VDD0
131 VDAC_0
132 VDAC_DVSS
133 VDAC_DVDD
134 VDAC_REFVDD
135 VDAC_REF
136 VDAC_REFVSS
137 XVSS
138 XOUT
139 XIN
140 XVDD
141 AVSS2
142 AVDD2
143 AVDD1
144 AVSS1
www
145 VDD
146 GND
147 XCK
.
148 LRCK
149 BCK
150 GPIO4 (1)
84
http://www.xiaoyu163.com
I/O
I/O SDRAM data
I/O SDRAM data
— Ground terminal (SDRAM I/O signal)
— Power supply terminal (+3.3V) (SDRAM I/O signal)
I/O System clock (not used)
— Not used
O S1 signal output
O Progressive/interlace switch signal output (not used)
— Not used
— Not used
— Power supply terminal (+3.3V) (I/O signal)
— Ground terminal (I/O signal)
— Not used
— Not used
— Not used
I Busy signal input from the EEPROM (IC203)
— Video DAC bias bit 4 (connected to the ground)
— Power supply terminal (+3.3V) (Video DAC 4)
O VDAC output 4
— Video DAC bias bit 3 (connected to the ground)
— Power supply terminal (+3.3V) (Video DAC 3)
O VDAC output 3
— Video DAC bias bit 2 (connected to the ground)
— Power supply terminal (+3.3V) (Video DAC 2)
O VDAC output 2
— Video DAC bias bit 1 (connected to the ground)
— Power supply terminal (+3.3V) (Video DAC 1)
O VDAC output 1
— Video DAC bias bit 0 (connected to the ground)
— Power supply terminal (+3.3V) (Video DAC 0)
O VDAC output 0
— Ground terminal (Video DAC digital system)
— Power supply terminal (+3.3V) (Video DAC digital system)
— Power supply terminal (Video DAC reference)
I Reference voltage input terminal(for Video DAC)
— Ground terminal (Video DAC reference)
— Ground terminal (crystal oscillator)
O Crystal oscillation signal output
I Crystal oscillation signal input
— Power supply terminal (crystal oscillator)
— Ground terminal (analog PLL)
— Power supply terminal (+3.3V) (analog PLL)
— Power supply terminal (+3.3V) (analog PLL)
— Ground terminal (analog PLL)
— Power supply terminal (+1.8V) (inside core)
— Ground terminal (inside core)
x ao
y
O Audio system clock output (not used)
i
O LRCK signal output for audio (not used)
O BCK signal output for audio (not used)
— Not used (pull-up)
http://www.xiaoyu163.com
8
Description
Q Q
3 6 7 1 3
u163
.
2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
m
co
9 9
2 8 9 9