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• Parallel input connector port
Signal allocation (Signal : Nibble)
Pin No. Return
Signal
pin No.
HostClk
1
19
2 - 9
20 - 27
Unknown
10
28
PrtClk
PtrBusy
11
29
AckDataReq
12
Xflag
13
14
HostBusy
16•17
GND
High
18
19 - 30
GND
31
16
Init
32
DataAvail
15•
NC
33 - 35
1284 Active
36
From/To
High
PC/DP
PC/DP
Unknown
PC/DP
Sends data in "Low" when HostBusy is "Low". After HostBusy
turns "High", this signal becomes "High".
PC/DP
Data4, Data8(MSB)
Data3, Data7
PC/DP
Data2, Data6
PC/DP
High: DP is on BUSY status.
Low: DP can send data.
Earth
PeripheralLogicHigh
PC/DP
Earth
PC/DP
Clears sending data to this unit. (Low) Incoming pulse width
should be 100 s minimum.
Data1(LSB), Data5
PC/DP
Unused
PC/DP
Becomes "High" when DP requests each mode of IEEE1284.
21
Function
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