Aaeon SBC-357 Manual page 50

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Select the Advanced Chipset Setup from the AMIBIOS Setup
main menu to enter the Chipset Setup. The following configura-
tions are based on the manufacturer's default settings.
This section allows you to configure the system based on the
specific features of the installed chipset. This chipset manages
bus speeds and access to system memory resources, such as
DRAM and the external cache. It also coordinates communica-
tions between the conventional ISA bus and the PCI bus. It must
be stated that these items should never need to be altered. The
default settings have been chosen, because they provide the best
operating conditions for your system.
AT Bus Clock
DRAM Refresh Type
DRAM Self-Refresh
Slow Refresh
RAS Precharge time
RAS Active Time Insert wait
CAS Precharge Time Insert Wait
Memory Write Insert Wait
Memory Miss Read Insert Wait
ISA I/O High Speed
ISA Memory High Speed
ISA Write cycle end Insert Wait
Memory Hole at 15-16M
I/O Recovery
I/O Recovery Period
16Bit ISA Insert Wait
42 SBC-357 User Manual
AMIBIOS SETUP — BIOS SETUP UTILITIES
(C) 1995 American Megatrends, Inc. All Rights Reserved
Standard CMOS Setup
Advanced CMOS Setup
Advanced Chipset Setup
Power Management Setup
Change User Password
Change Supervisor Password
Change Language Setting
Auto Configuration with Optimal Settings
Auto Configuration with Fail Safe Settings
Save Settings and Exit
Standard CMOS setup for changing time, date, hard disk type, etc.
ESC: Exit
:Sel
¯-
AMIBIOS SETUP — ADVANCED CHIPSET SETUP
(C) 1995 American Megatrends, Inc. All Rights Reserved
Peripheral Setup
Exit Without Saving
F2/F3: Color F10: Save & Exit
:14. 318/2
Available Options:
:RAS only
14.318/2
:Disable
PCLK 2/3
:15 us
PCLK 2/4
:2.5T
PCLK 2/6
:Enabled
:Enabled
:Disabled
PCLK 2/8
:Disabled
PCLK 2/10
:Disabled
PCLK 2/12
:Disabled
ESC: Exit
:Enabled
PgUp/PgDn: Modify
:Disabled
F2/F3: Color
:Enabled
:0.50 us
:Enabled
:Sel
¯-

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