Yamaha RX-Z11 Service Manual page 93

Function Name
No. Port Name
M25 nRESET
T25 XI_S
T24 XO_S
AE24 XI_A
AD24 XO_A
T22 TEST0
R23 TEST1
T23 TEST2
AA3 nTRST
AB1 TDI
AC1 TDO
AA2 TCK
AB3 TMS
AB2 RTCK
L23 nSCS3
L24 nSCS2
K23 nSCS1
K24 nSCS0
J23 nSLBE
J24 nSUBE
K25 nSWR
J25 nSRD
** SA[22:0]
** SD[15:0]
B1 SCLK0
C1 SCKE0
D1 SCLK1
E1 SCKE1
F1 nCS1
C2 nCS0
E3 nWE
F2 nRAS
E2 nCAS
A9 DQM3
B9 DQM2
C9 DQM1
C10 DQM0
** A[11:0]
F3 A12
J2 A13
J1 A14
** D[31:0]
L25 nINT0 JTAG_CK_INT
M24 nINT1
M23 nINT2
AE7 TXD0/AGPIO[3]
AE8 RXD0/AGPIO[0]
AD7 nCTS0/AGPIO[4]
AD8 nRTS0/AGPIO[1]
AC8 EXTCLK0/AGPIO[2]
AE5 TXD1/AGPIO[9] CPU_MOSI(_3)
I/O
(P.C.B.)
MCU System reset terminal
MCU System clock crystal oscillation terminal
MCU System clock crystal oscillation terminal
MCU Audio clock crystal oscillation terminal
MCU Audio clock crystal oscillation terminal
MCU Test mode setting
MCU Test mode setting
MCU Test mode setting
MCU For JTAG connection
MCU For JTAG connection
MCU For JTAG connection
For JTAG connection
MCU
MCU For JTAG connection
MCU For JTAG connection
CS Chip select 3 for YGV619 MEM access (Video ON)
CS Chip select 2 for YGV619 REG access (Video ON)
CS Chip select 1 for Flash ROM access
CS Chip select 0 for NPGA #1#2 access
BUS Lower byte write enable / Separation enable by bus buffer (Video ON)
BUS
BUS Upper byte write enable / Separation enable by bus buffer (Video ON)
BUS 8 bit device write enable
BUS Read enable
BUS
BUS Separation enable by bus buffer (Video ON)
BUS SRAM address bus / CS0 space
BUS / CS1 space
BUS / CS2 space / Separation enable by bus buffer (Video ON)
BUS / CS3 space / Separation enable by bus buffer (Video ON)
BUS SRAM data bus
BUS
BUS Separation enable by bus buffer (Video ON)
BUS Separation enable by bus buffer (Video ON)
BUS SDRAM clock
BUS SDRAM clock enable
BUS SDRAM clock
BUS SDRAM clock enable
SDRAM chip select 1
CS
SDRAM chip select 0
CS
BUS SDRAM write enable
BUS SDRAM row address strobe
BUS SDRAM column address strobe
BUS SDRAM data input/output mask3
BUS SDRAM data input/output mask2
BUS SDRAM data input/output mask1
BUS SDRAM data input/output mask0
BUS SDRAM address bus
BUS
BUS
BUS
ADRAM data bus
BUS
IRQ Detected when using JTAG. For determining DRM operating /not operating
Interrupt input 1 from GA #1
GA1_N_INT IRQ
GA2_N_INT IRQ Interrupt input 2 from GA #2
DBG_MOSI SO For debugging
DBG_MISO SI For debugging
DBG_LED0 O For debugging LED output 0
DBG_LED1 O For debugging LED output 1
DIG_FMT O Digital full MUTE (HI=MUTE)
SO Communication between micro-processors (asynchronous)
RX-Z11/DSP-Z11
Detail of Function
93