Yamaha RX-Z11 Service Manual page 70

RX-Z11/DSP-Z11
SPI Check
OK : 0
NG : 1
The PLL (Phase Locked Loop) operation is checked.
PLL Lock Check
PLL (Phase Locked Loop) of NPGA1 (IC743) is locked.
(24MHz (XL741) only)
VCXO 22M High limit
The VCXO0 (79pin, TP7418) value of NPGA1 (IC743) is set
to 22MHz+300ppm or lower.
VCXO 22M Low limit
The VCXO0 (79pin, TP7418) value of NPGA1 (IC743) is set
to 22MHz-300ppm or lower.
VCXO 24M High limit
The VCXO1 (83pin, TP7417) value of NPGA1 (IC743) is set
to 24MHz+300ppm or lower.
VCXO 24M Low limit
The VCXO1 (83pin, TP7417) value of NPGA1 (IC743) is set
to 24MHz-300ppm or lower.
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19.DSP CHECK
SPI:0000
Error detection of DSP#4 (IC514) /
Error detection of DSP#3 (IC510) /
Error detection of DSP#2 (IC506) /
Error detection of DSP#1 (IC504) /
19.DSP CHECK
PLL LOCK:NG
19.DSP CHECK
VCXO 22M High
19.DSP CHECK
VCXO 22M Low
19.DSP CHECK
VCXO 24M High
19.DSP CHECK
VCXO 22M Low