Xerox WorkCentre XK50cx Service Manual page 29

Circuit
4-1-2 MFP Controller (KS32C6400 : U15)
MFP Controller consists of CPU (ARM7TDMI RISC
processor), 4K-byte cache, data and address buses,
print head controller, parallel port interface, external
DMA part to receive data from external color image
processor (DUOIP2 : U16), LF/CR motor
controller and I/O controller.
SYSTEM CLOCK
IP-CLK : U15 - 151
The internal clock frequency is 40MHz. 40MHz
system clock (MCLK) supplied from the outside is
used without being divided inside.
DATA & ADDRESS BUS CONTROL
• /RD & /WR : U15 - 112 & U15 - 113 or
U16 - 8 & 9, U27 - 36 & 13,
U25 - 28 & 11, U23 - 33 & 32,
/RD & /WR signals are synchronized with
MCLK(40MHz) and become LOW ACTIVE.
These signals are strobe signals used to read and
write data when each CHIP SELECT is connected
with /RD and /WR pin of RAM, ROM and the
outside devices and becomes active.
4-2
• CHIP SELECT(/IP_CS, /ROM_CS1, /IUSB_CS, /MCS)
- /IP_CS : U15 - 119 or U16 - 7,
DUOIP CHIP SELECT (LOW ACTIVE)
- /ROMCS : U15 - 105 or U25 - 26,
FLASH MEMORY CHIP SELECT (LOW ACTIVE)
- /USB_CS : U15 - 118 or U23 - 31,
USB CHIP SELECT (LOW ACTIVE)
- /RAS :U15 - 108 or U27 - 14,
- /MCS : U15 -117or U18 -5,
MODEM CHIP SELECT (LOW ACTIVE)
When each CHIP SELECT is low, data can be read
or written.
• D0 - D15 : U15 - 63 ~ 67, 72 ~ 79
- 16bit data bus
• A0 - A17 : U15 - 81 ~ 91, 93 ~ 100
- ADDRESS BUS (A19 - A21 are reserved.)