Wyse WY-60 Maintenance Manual page 94

The output from either oscillator is buffered by the 74S00. The
dot clock from the dividers goes to the pin 1 of the gate array.
Within the gate array, the character clock generator includes a
counter and combinational logic which divides the dot clock by 10
in 8
a-
col u mn mod e fora eeL K rat eo f 2. 6 5 8 MHz and by 9 for a
CCLK rate of 4.412 MHz in 132-column mode.
Programmable Video Controller--The 2672 programmable video timing
controller (PVTC) (U9) provides all the timing and control
signals for displaying characters on the CRT. The 8051
initializes the 2672 with the display parameters when a user
turns the terminal on. Before each displayable character row,
the 8051 gives the 2672 the beginning character address for that
row. The 2672 fetches characters from the display RAM during the
first scan line of each displayable character row. During the
following 15 scan lines the characters are retrieved from the row
buffer.
The 2672 warns the 8051 of an impending DMA transfer by asserting
BREQ nine microseconds before the DMA transfer begins. After
nine microseconds, the 2672 asserts memory bus control (MBC)
which ports the display RAM into the row buffer RAM.
Attribute Control--Attribute control determines
displays characters. There are six attributes:
blank, reverse, blink, and underline. There are
modes: hidden and nonhidden.
the way the CRT
normal, dim,
two attribute
Attribute control data in the hidden attribute mode doesn't
occupy any space in the video RAM (U7) that stores character
data. Instead, the attribute data or information is stored in
separate RAM (u8) reserved for attribute data.
Attribute control data in the nonhidden attribute mode does
occupy a space in the video RAM that stores character data. The
code signaling any attribute to be displayed occupies the
character space on the screen before the text that will be
displayed in that attribute.
Font RAH--Each character cell is 10 x 16 (80 column) or 9 x 16
(132 column) with a character matrix of 7 x 12 dots (with three
dot decenders.) The font RAM (U19) is a 6264 (8Kx8) RAM that
stores displayable and nondisplayable characters and symbols.
Video Shift Register--The video shift register (gate array) sends
the serial bit stream to the video input of the monitor
circuitry. The shift register loads parallel character data from
the character generator RAM at the CCLK rate, and shifts the data
out serially at the dot clock rate to the video drive circuitry
within the monitor circuitry.
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