Wyse WY-60 Maintenance Manual page 87

Keyboard interface (U23)--The microprocessor
commun.ic~tes
with
the keyboard on two lines. It
ch~cks
to see if a key has been
pressed on the keyboard by addressing the key matrix with the
keyclock signal (CMD), then examining the keyboard return line
(DATA) on the data bus. The microcontroller looks for the
positive key return on port one, bit six.
Row buffer RAM (U15, U16)--The row buffer RAMs hold, in order,
character codes and
~ttribute
information for the current row
being displayed or refreshed. RAM U15 holds character codes.
RAM U16 holds attribute information.
Video address latches (U13, U14)--The video address buffers hold
address information sent from the PVCT until BREQ goes high and
signals the CPU off the data bus. When the data bus is
cl~ar,
the video address buffers send the addresses to the display RAMs
U7 and uS.
Character and Attribute RAM (U7, US)--The logic circuitry
contains two SKxS static RAMs. One of the RAMs stores character
dat~, while the remaining RAM stores attribute data, for hidden
(non-embedded) and embedded attributes. Attribute memory
loc~tions are addressed automatically each time character memory
is addressed. This allows the S-bit microprocessor to read and
write 16-bit words.
Character row buffer data latch (U1S)--The character row buffer
data latch stores each character to be displayed (one at a time)
for the character generation circuitry.
Font RAM (U19)--This SKxS RAM stores character data for the
fonts. Two bits set in the attribute byte select
e~ch
of the
four fonts in this RAM. The S051 selects the font and sends this
information to the gate array. At power-on, the gate array loads
font information into the font RAM.
Dot clock oscillator (U21 )--The
two crystal oscillators: 26.580
39.710 MHz for 132-column mode.
controls oscillator selection.
clock rate.
dot clock oscillator consists of
MHz for SO-column mode and
The 8051, port 1, bit 0,
The oscillator output is the dot
Nonvolatile memory (U2)--The nonvolatile memory consists of an
EEPROM. This memory stores setup parameters such as baud rate
and parity. The EEPROM retains its data until reprogrammed. It
connects directly with S051 ports Pl.1 (data) and Pl.2 (clock).
Level converters
(ElA
to TTL) (U25, U28)--These level converters
change the EIA RS-232C logic levels to TTL levels for the UART.
Level converters (TTL TO
ErA)
(U26, U27)--These level converters
change the TTL logic levels from the UART to RS-232C to
communicate with external equipment.
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