Omron NJ501-1 Series User Manual page 274

Appendices
Allocated
CIO word
External connec-
tion and terminal-
device variable
diagram
12 to
24
VDC
• When wiring, pay careful attention to the polarity of the
external power supply. The load may operate incor-
rectly if the polarity is reversed.
• Be sure to wire both terminals A9 and A19 (COM0) of
CN1.
• Be sure to wire both terminals B9 and B19 (COM1) of
CN1.
• Be sure to wire both terminals A10 and A20 (+V) of
CN1.
• Be sure to wire both terminals B10 and B20 (+V) of
CN1.
A-32
CN1
Connec-
Signal
Signal
tor pin
name
name
B20 A20
+V
+V
B19 A19
COM0
COM1
L L
B18 A18
Jxx_Ch2_Out15 Jxx_Ch1_Out15
L L
B17 A17
Jxx_Ch2_Out14 Jxx_Ch1_Out14
L A16 L
B16
Jxx_Ch2_Out13 Jxx_Ch1_Out13
L L
B15 A15
Jxx_Ch2_Out12 Jxx_Ch1_Out12
L L
B14 A14
Jxx_Ch2_Out11 Jxx_Ch1_Out11
L L
B13 A13
Jxx_Ch2_Out10 Jxx_Ch1_Out10
L L
B12 A12
Jxx_Ch2_Out09
Jxx_Ch1_Out09
L L
B11 A11
Jxx_Ch2_Out08 Jxx_Ch1_Out08
B10 A10
+V
+V
B9 A9
COM1 COM0
L L
B8 A8
Jxx_Ch2_Out07 Jxx_Ch1_Out07
L L
B7 A7
Jxx_Ch2_Out06 Jxx_Ch1_Out06
L L
B6 A6
Jxx_Ch2_Out05 Jxx_Ch1_Out05
L L
B5 A5
Jxx_Ch2_Out04 Jxx_Ch1_Out04
L L
B4 A4
Jxx_Ch2_Out03 Jxx_Ch1_Out03
L L
B3 A3
Jxx_Ch2_Out02 Jxx_Ch1_Out02
L L
B2 A2
Jxx_Ch2_Out01 Jxx_Ch1_Out01
L L
B1 A1
Jxx_Ch1_Out00
Jxx_Ch2_Out00
Signal
Allocated
Allocated
name
CIO word
CIO word
Jxx_Ch3_Out00
L
Jxx_Ch3_Out01
L
Jxx_Ch3_Out02
L
12 to
Jxx_Ch3_Out03
24
L
VDC
Jxx_Ch3_Out04
L
Jxx_Ch3_Out05
L
Jxx_Ch3_Out06
L
Jxx_Ch3_Out07
L
Jxx_Ch3_Out08
L
Jxx_Ch3_Out09
L
Jxx_Ch3_Out10
L
Jxx_Ch3_Out11
L
Jxx_Ch3_Out12
L
Jxx_Ch3_Out13
L
12 to
24 Jxx_Ch3_Out14
L
VDC
Jxx_Ch3_Out15
L
• When wiring, pay careful attention to the polarity of the
external power supply. The load may operate incor-
rectly if the polarity is reversed.
• Be sure to wire both terminals A9 and A19 (COM2) of
CN2.
• Be sure to wire both terminals B9 and B19 (COM3) of
CN2.
• Be sure to wire both terminals A10 and A20 (+V) of
CN2.
• Be sure to wire both terminals B10 and B20 (+V) of
CN2.
NJ-series CPU Unit Hardware User's Manual (W500)
CN2
Connec-
Signal
Allocated
tor pin
name
CIO word
Jxx_Ch4_Out00
A1 B1
L
Jxx_Ch4_Out01
A2 B2
L
Jxx_Ch4_Out02
A3 B3
L
12 to
Jxx_Ch4_Out03
24
A4 L
B4
VDC
Jxx_Ch4_Out04
A5 L
B5
Jxx_Ch4_Out05
A6 B6 L
Jxx_Ch4_Out06
L
A7 B7
Jxx_Ch4_Out07
A8 B8 L
COM2 COM3
A9 B9
+V +V
A10 B10
Jxx_Ch4_Out08
L
A11 B11
Jxx_Ch4_Out09
L
A12 B12
Jxx_Ch4_Out10
L
A13 B13
Jxx_Ch4_Out11
L
A14 B14
Jxx_Ch4_Out12
L
A15 B15
Jxx_Ch4_Out13
L
A16 B16
Jxx_Ch4_Out14
L
A17 B17
Jxx_Ch4_Out15
L
A18 B18
COM2 COM3
A19 B19
+V +V
A20 B20