Clear Bit - Mitsubishi MELSEC-Q EQ-V680D1 User Manual

6. HOW TO COMMUNICATE WITH ID TAGS

6.2.4 Clear bit

Data before execution
Write data
Data after execution
*Shaded area: Holds the data before execution.
*Area outlined in bold: Writes the write data.
Data before execution
Write data
Data after execution
*Shaded area: Holds the data before execution.
*Area outlined in bold: Writes the write data.
6 - 4
The Clear Bit command clears the bits of the data of the number of bytes specified in
the number of processed points specification area (Un\G4, Un\G4004) from the
address specified in the head address specification area (Un\G3, Un\G4003), and
writes the result in the same address of the ID tag.
The data for which bits are to be cleared are stored in the data storage area (Un\G100
to Un\G101, Un\G4100 to Un\G4101).
(1) Example of use
(a) When executing the Clear Bit command in the data storage order 0000
-> lower) of the processing specification, for the three bytes from address 0010
Buffer memory
Address
b15
Stored data
Un\G100
24 68
H
Un\G101 13 57
H
b7 b0
0 0 0 1 0 0 1 0
0 0 1 0 0 1 0 0
0 0 0 1 0 0 1 0
(b) When executing the Clear Bit command in the data storage order 0001
-> upper) of the processing specification, for the three bytes from address 0010
Buffer memory
Address
b15
Stored data
Un\G100
24 68
H
13 57
Un\G101
H
b7 b0
0 0 0 1 0 0 1 0
0 1 1 0 1 0 0 0
0 0 0 1 0 0 1 0
ID tag
Before
b0 b7
execution
0010 12
H
34
0011
H
56
0012
H
78
0013
H
b7 b0 b7
0 0 1 1 0 1 0 0 0 1
0 1 1 0 1 0 0 0 0 0
0 0 0 1 0 1 0 0 0 1
ID tag
Before
b0 b7
execution
12
0010
H
34
0011
H
0012 56
H
78
0013
H
b7 b0 b7
0 0 1 1 0 1 0 0 0 1
0 0 1 0 0 1 0 0 0 1
0 0 0 1 0 0 0 0 0 0
b0 b7
0010
H
H
0011
H
H
0012
H H
0013
H
H
b0
0 1 0 1 1 0 1234 56
H H
0 1 0 0 1 1 2468 13
H H
0 0 0 1 0 0 1214 44
H H
b0 b7
0010
H H
0011
H
H
0012
H
H
0013
H
H
b0
0 1 0 1 1 0 1234 56
H H
0 1 0 1 1 1 6824 57
H H
0 0 0 0 0 0 1210 00
H H
(upper
H
H
ID tag
After
b0
execution
12
H
14
H
44
H
78
H
(lower
H
H
ID tag
After
b0
execution
12
H
10
H
00
H
78
H
6 - 4