Powerdown Transition Times; Examples - Xilinx Virtex-5 RocketIO GTP User Manual

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Powerdown Transition Times

The delays between changes in the powerdown state when TXPOWERDOWN and
RXPOWERDOWN are changed are controlled by the TRANS_TIME_FROM_P2,
TRANS_TIME_NON_P2, and TRANS_TIME_TO_P2 attributes as described in
Each TRANS_TIME delay is set in terms of internal 25 MHz clock cycles. The internal
25 MHz clock rate is set using the CLK25_DIVIDER attribute and the reference clock rate.
Equation 5-6

Examples

The example shown in
unused tile or an unused transceiver in a tile.
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
is used to determine the actual rate.
⎛
Transition time in ns
=
⎝
Figure 5-10
Disabled Tile
GTP_DUAL Tile
1 RXPOWERDOWN0[1]
1 RXPOWERDOWN0[0]
1 TXPOWERDOWN0[1]
1 TXPOWERDOWN0[0]
1 PLLPOWERDOWN
0 REFCLKPWRDNB
1 TXPOWERDOWN1[1]
1 TXPOWERDOWN1[0]
1 RXPOWERDOWN1[1]
1 RXPOWERDOWN1[0]
Figure 5-10: Powering Down an Unused Tile
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⎞
CLK25_DIVIDER
×
---------------------------------------------- - TRANS_TIME attribute
⎠
CLKIN
shows the recommended method to power down an
1
1
1
1
Controlled
by
Application
Power Control
Table
Equation 5-6
Disabled Transceiver
GTP_DUAL Tile
RXPOWERDOWN0[1]
RXPOWERDOWN0[0]
Disabled
Transceiver
TXPOWERDOWN0[1]
TXPOWERDOWN0[0]
PLLPOWERDOWN
REFCLKPWRDNB
TXPOWERDOWN1[1]
TXPOWERDOWN1[0]
RXPOWERDOWN1[1]
RXPOWERDOWN1[0]
UG196_c5_10_082906
5-10.
85