Examples - Xilinx Virtex-5 RocketIO GTP User Manual

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Examples

Powerup and Configuration
All the GTP_DUAL tiles are reset automatically after configuration. The supplies for the
calibration resistor and calibration resistor reference must be powered up before
configuration to ensure correct calibration of all the transceivers termination impedance.
Turning on a Reference Clock
The reference clock source(s) and the power to the GTP_DUAL tile must be available
before configuring the FPGA. If the reference clock(s) or GTP_DUAL tile(s) are powered
up after configuration, apply GTPRESET to allow the shared PLL(s) to lock.
Changing a Reference Clock
Whenever the reference clock input to a GTP_DUAL tile is changed, the shared PLL must
be reset to ensure that it locks to the new frequency. The GTPRESET port must be used for
this purpose.
Parallel Clock Source Reset
The clocks driving TXUSRCLK, RXUSRCLK, TXUSRCLK2, and RXUSRCLK2 must be
stable for correct operation. These clocks are often driven from a PLL or DCM in the FPGA
to meet phase and frequency requirements. If the DCM or PLL loses lock, and begins
producing incorrect output, TXRESET and RXRESET must be used to hold transceiver PCS
in reset until the clock source is locked again.
If the TX or RX buffer is bypassed and phase alignment is in use, phase alignment must be
performed again after the clock source re-locks.
Remote Power Up
If the remote source of incoming data is powered up after the GTP transceiver receiving its
data is operating, the RX CDR must be reset to ensure a clean lock to the incoming data.
RXELECIDLERESET must be used for this purpose.
Electrical Idle Reset
When the differential voltage of the RX input to a GTP transceiver drops to OOB or
electrical idle levels, the RX CDR can be pulled out of lock by the apparent sudden change
in frequency. To ensure the CDR can re-lock, it must be held in reset until the signal returns
using RXELECIDLERESET.
Figure 5-9
Electrical Idle or OOB/beacon signals are used, and is recommended for all designs. The
circuit asserts RXELECIDLERESET whenever RXELECIDLE is detected. RXELECIDLE is
asserted whenever the RXOOB circuit is reset. RESETDONE prevents the
RXELECIDLERESET signal from being asserted while another reset is in progress.
Connecting RXP/RXN
When the RX data to the GTP transceiver comes from a connector that can be plugged in
and unplugged, the RX CDR must be reset when the data source is plugged in to ensure
that it can lock to incoming data. Use RXELECIDLERESET to perform this reset.
Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
shows the Link Idle reset circuit. This circuit is required for designs where
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Reset
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