SOYO SY-P4VGA User Manual page 50

BIOS Setup Utility
3-3.1 DRAM Clock/Drive Control
Caution: Change these settings only if you are already familiar
with the Chipset.
The [DRAM Clock/Drive Control] option changes the values of the
chipset registers. These registers control the system options in the
computer.
Current FSB Frequency
Current DRAM Frequency
DRAM Clock
DRAM Timing
x SDRAM CAS Latency
x Bank Interleave
x Precharge to Active(Trp)
x Active to Precharge (Tras)
x Active to CMD (Trcd)
DRAM Command Rate
DRAM Burst Len
CPU read DRAM Mode
Enter:Select
:Move
F5:Previous Values
After you have completed the changes, press [Esc] and follow the
instructions on your screen to save your settings or exit without saving.
Frequency Mode
Current FSB
Frequency
Current DRAM
Frequency
Phoenix – Award BIOS CMOS Setup Utility
DRAM Clock/Drive Control
100 MHz
100 MHz
By SPD
By SPD
2.5
Disabled
3T
6T
3T
2T Command
4
Medium
+/-/PU/PD:Value
F6:Fail-Safe Defaults
Setting
Menu Level
F10:Save ESC:Exit
Description
Current FSB Frequency.
Current DRAM Frequency.
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SY-P4VGA
Item Help
F1:General Help
F7: Optimized Defaults