Motorola M68000 User Manual page 134

NBCD
NEG
NEGX
NOT
Scc
TAS
TST
+Add effective address calculation time.
*Use nonfetching effective address calculation time.
Table 9-10. Clear Instruction Execution Times
Size
CLR Byte, Word 4(1/0)
Long 6(1/0)
*The size of the index register (Xn) does not affect execution time.
MOTOROLA M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
Freescale Semiconductor, Inc.
Table 9-9. Single Operand Instruction
Execution Times
Instruction Size
Byte
Byte, Word
Long
Byte, Word
Long
Byte, Word
Long
Byte, False
Byte, True
Byte
Byte, Word
Long
Dn An (An) (An)+
— 8(1/1) 8(1/1)
— 12(1/2) 12(1/2)
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Register Memory
6(1/0) 8(1/1)+
4(1/0) 8(1/1)+
6(1/0) 12(1/2)+
4(1/0) 8(1/1)+
6(1/0) 12(1/2)+
4(1/0) 8(1/1)+
6(1/0) 12(1/2)+
4(1/0) 8(1/1)+*
4(1/0) 8(1/1)+*
4(1/0) 14(2/1)+*
4(1/0) 4(1/0)+
4(1/0) 4(1/0)+
–(An) (d 16 , An) (d 8 , An, Xn)*
10(1/1) 12(2/1) 16(2/1)
14(1/2) 16(2/2) 20(2/2)
(xxx).W (xxx).L
12(2/1) 16(3/1)
16(2/2) 20(3/2)
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