Memory Configuration - Foxconn Cinema II Deluxe User Manual

Memory Configuration

► Memory Features
► ECC Configuration
DRAM Clock Mode
DRAM Voltage Offset
Current DRAM Voltage
Target DRAM Voltage
DRAM Timing Mode
↑↓←→:Move Enter:Select
► Memory Features / ECC Configuration
Press <Enter> to go to its submenu.
► DRAM Clock Mode
This option is used to configuation Memory Frequency,Timings and Subtimings. Setting values
are: [Auto], [Limit],[Manual].
[Auto]: DRAM SPD profile1;
[Limit]: DRAM SPD profile2;
[Manual]: DRAM by Manual.
► DRAM Voltage Offset
This option is used to change the DRAM voltage in a step of 40mV. The voltage can be incre-
mented from +40mV to +480mV.
► DRAM Timing Mode
When both DCTs (DRAM controller) are enabled in unganged mode, BIOS must initialize the
frequency of each DCT in order, you also can configure the timings manually.
Settings are : [Auto],[DIMM1/3],[DIMM2/4],[Both].
► tCL (CAS Latency)
The number of memory clocks it takes a DRAM to return data after the read CAS_L is assert-
ed depends on the memory clock frequency. The value that BIOS programs into the memory
controller is a function of the target clock frequency. The target clock frequency is determined
from the supported CAS latencies at given clock frequencies of each DIMM.
► tRCD (RAS-to-CAS Delay)
This item allows you to select a delay time (in clock cycles) between the CAS# and RAS#
strobe signals.
► tRP (Precharge Command Period)
This item allows you to select the row precharge time (in clock cycles).
► tRAS (Active-to-Precharge Delay)
This item allows you to set the minimum RAS# active time (in clock cycles).
► tRTP (Internal Read to Precharge Command Delay)
Internal READ Command to PRECHARGE Command delay
CMOS Setup Utility - Copyright (C) 1985-2009, American Megatrends, Inc.
Memory Configuration
+/-/:Value
F2/F3:Change Colors
[Press Enter]
[Press Enter]
[Auto] Adjust the CPUs
[+80mV] Integrated Memory
:1.616 V (+80mV) Controller
:1.616 V (+80mV)
[Auto]
F10:Save ESC:Exit
F9:Optimized Defaults
40
Help Item
F1:General Help