Power; Table 2-2 Power Inputs - Motorola DSP56012 User Manual

2.2

POWER

Power Name
V PLL Power—V
CCP
should be well-regulated and the input should be provided with an extremely
low impedance path to the V
by a 0.1 F capacitor located as close as possible to the chip package.
V Quiet Power—V
CCQ
input must be tied externally to all other chip power inputs. The user must
provide adequate external decoupling capacitors.
V
A Power—V
CCA
input must be tied externally to all other chip power inputs. The user must
provide adequate external decoupling capacitors.
V D Power—V
CCD
input must be tied externally to all other chip power inputs. The user must
provide adequate external decoupling capacitors.
V Host Power—V
CCH
be tied externally to all other chip power inputs. The user must provide adequate
external decoupling capacitors.
V
Serial Host Power—V
CCS
input must be tied externally to all other chip power inputs. The user must
provide adequate external decoupling capacitors.
MOTOROLA

Table 2-2 Power Inputs

Description
is V dedicated for Phase Lock Loop (PLL) use. The voltage
CCP CC
power rail. V
CC
is an isolated power for the internal processing logic. This
CCQ
is an isolated power for sections of the internal chip logic. This
CCA
is an isolated power for sections of the internal chip logic. This
CCD
is an isolated power for the HI I/O drivers. This input must
CCH
is an isolated power for the SHI I/O drivers. This
CCS
DSP56012 User's Manual
Signal Descriptions
should be bypassed to GND
CCP

Power

P
2-5