Intel SE7221BA1 Technical Manual page 58

System BIOS
Code Description of POST Operation
88 Returned from CMOS setup program and screen is cleared. About to do programming after setup.
89 Programming after setup complete. Going to display power-on screen message.
8B First screen message displayed. <WAIT...> message displayed. PS/2 Mouse check and extended BIOS
data area allocation to be done.
8C Setup options programming after CMOS setup about to start.
8D Going for hard disk controller reset.
8F Hard disk controller reset done. Floppy setup to be done next.
91 Floppy setup complete. Hard disk setup to be done next.
95 Init of different buses optional ROMs from C800 to start. (See Section 7.11 for details of different buses.)
96 Going to do any init before C800 optional ROM control.
97 Any init before C800 optional ROM control is over. Optional ROM check and control will be done next.
98 Optional ROM control is done. About to give control to do any required processing after optional ROM
returns control and enable external cache.
99 Any initialization required after optional ROM test over. Going to setup timer data area and printer base
address.
9A Return after setting timer and printer base address. Going to set the RS-232 base address.
9B Returned after RS-232 base address. Going to do any initialization before Coprocessor test.
9C Required initialization before Coprocessor is over. Going to initialize the Coprocessor next.
9D Coprocessor initialized. Going to do any initialization after Coprocessor test.
9E Initialization after Coprocessor test is complete. Going to check extended keyboard, keyboard ID and
num-lock.
A2 Going to display any soft errors.
A3 Soft error display complete. Going to set keyboard typematic rate.
A4 Keyboard typematic rate set. To program memory wait states.
A5 Going to enable parity/NMI.
A7 NMI and parity enabled. Going to do any initialization required before giving control to optional ROM at
E000.
A8 Initialization before E000 ROM control over. E000 ROM to get control next.
A9 Returned from E000 ROM control. Going to do any initialization required after E000 optional ROM
control.
AA Initialization after E000 optional ROM control is over. Going to display the system configuration.
AB Put INT13 module runtime image to shadow.
AC Generate MP for multiprocessor support (if present).
AD Put CGA INT10 module (if present) in Shadow.
AE Uncompress SMBIOS module and init SMBIOS code and form the runtime SMBIOS image in shadow.
B1 Going to copy any code to specific area.
00 Copying of code to specific area done. Going to give control to INT-19 boot loader.
48
Intel® Entry Server Board SE7221BA1-E TPS
Revision 1.5