HP Visualize J5000 - Workstation Handbook page 63

Table 3-1. Chassis Codes for J5000 and J7000 Workstations
Ostat Code FRU
WRN 4 n 01 SYS BD
TST 4 n 0E SYS BD
4 n 20
TST SYS BD
TST 4 n 21 SYS BD
TST 4 n 22 SYS BD
TST 4 n 23 SYS BD
TST 4 n 24 SYS BD
4 n 25
TST SYS BD
TST 4 n 26 SYS BD
TST 4 n 27 SYS BD
TST 4 n 28 SYS BD
TST 4 n 29 SYS BD
4 n 2A
TST SYS BD
TST 4 n 2B SYS BD
TST 4 n 2C SYS BD
TST 4 n 2D SYS BD
4 n 30
TST SYS BD
TST 4 n 40 SYS BD
TST 4 n 50 SYS BD
Chapter 3
Message
CPU n skip lst
CPU n exit lst
CPU n lst erly st
CPU n lst basic
CPU n lst alu
CPU n lst branch
CPU n lst arth cd
CPU n lst bit ops
CPU n lst ctl reg
CPU n lst ext int
CPU n lst itimer
CPU n lst mltimed
CPU n lst shadow
CPU n lst dg regs
CPU n lst rdrs
CPU n lst bypass
CPU n cache byte
CPU n cache flush
CPU n icache miss
Identifying LCD-Indicated Conditions
Description
CPU n is bypassing its late self-tests to
save time.
CPU n finished its late self-tests.
CPU n is re-executing some of its early
self-tests from system memory.
CPU n is re-executing its basic operations
self-test.
CPU n is re-executing its arithmetic and
logic unit self-test.
CPU n is re-executing its branch
instruction self-test.
CPU n is re-executing its arithmetic
conditions self-test.
CPU n is re-executing its bit operations
self-test.
CPU n is re-executing its control regioster
self-test.
CPU n is re-executing its external
interrupt self-test.
CPU n is re-executing its interval timer
self-test.
CPU n is re-executing its multi-media
instructions self-test.
CPU n is re-executing its shadow register
self-test.
CPU n is re-executing its diagnose
register self-test.
CPU n is re-executing its integer bypass
operation self-test.
CPU n is starting its data cache sub-word
operations self-test.
CPU n is starting its cache flush self-test.
CPU n is starting its instruction cache
miss self-test.
Troubleshooting
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