Core Low Power States - Intel Pga478 - P4-2ghz 512kb 400mhz Fsb Datasheet

Low Power Features—Intel
Figure 2.

Core Low Power States

2.1.1 Core Low Power States
2.1.1.1 C0 State - Normal State
This is the normal operating state for the processor.
2.1.1.2 C1/AutoHALT Powerdown State
AutoHALT is a low power state entered when the processor executes the HALT
instruction. The processor transitions to the Normal state upon the occurrence of SMI#,
BINIT#, INIT#, LINT[1:0] (NMI, INTR), or an interrupt delivered over the system bus.
RESET# causes the processor to immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either
Normal Mode or the AutoHALT Power Down state. Refer to the
Architectures Software Developer's Manuals
Guide for more information.
The system can generate a STPCLK# while the processor is in the AutoHALT Power
Down state. When the system deasserts the STPCLK# interrupt, the processor returns
execution to the HALT state.
While in AutoHALT Power Down state, the processor continues to processes system bus
snoops.
January 2007
Order Number: 315876-002
® ®
Celeron Processor 1.66 GHz/1.83 GHz
STPCLK#
asserted
STPCLK#
de-asserted
C1/
MWAIT
Core state break
or MONITOR
MWAIT(C1)
halt break = A20M#transition, INIT#, INTR, NMI, PREQ#, RESET#, SMI#, or APIC interrupt
core state break = (halt break OR MONITOR event) AND STPCLK# high (not asserted)
Stop
Grant
de-asserted
STPCLK#
asserted
STPCLK#
STPCLK#
asserted
de-asserted
HLT instruction
C0
in Volume 3A/3B: System Programming
®
Intel Celeron
STPCLK#
C1/Auto
Halt
Halt break
Intel® 64 and IA-32
®
Processor 1.66 GHz/1.83 GHz
DS
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