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Internal Block Diagram of Other ICs
M@
M62302P(iC202) : A/D converter for AV level
1. Terminal Layout
—
2.Terminal Description
CR2
RO2
VIN2
vec
vec
rScK
GND
| bo
a
19
+5V
3. Block Diagram
-RO2
—cR2vee
i
ra
fH
:
A/D Converter
Rectifier
Root means
:
square AMP
a
vine &
Ss
yeat->
VIN2 [2I
Wy i
\
&)
vz
oer
mt
internal clock
~
4Control circuit
ry.
[25
il
4
G
R01
cRi = GND
.
iN2
vce
« : High impedance
Hemost
[PinNo.| Symbol [vO]
Description _——S—S—id
CR1
This is a terminal to determine the response of the
CR2
output.
:
.
2
R01
This is a termina) to determine the response of the
13
~ ROZ.
output.
3
VIN4
;
5
:
VIN2
G
Analog signal input termina!
[eens
Digital ooutput terminal
Chip select terminal
DO terminal is enable when this terminal is "L'.
ee
Clock signal input
SCK
The accuracy of the A/D conversion depends on this clock
speed.
wae
Doct
SE
TD-MXG9BK
vee
=
arable
teh
TA
VY.
t
Q
©
BH VC4580LD (1C111,112)
: Dual OP Amp.
A OUT
A
A +IN
-Vec
1-3 (No. 20437)
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