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SE-MIXG9BK
HM MN170801JPU
(1C611) : DSP CONTROL "COM
1. Terminal Layput
2. Pin Functions
1] Fia_[ 1 | 5 dete input trom 301 ATA
ee
DSP request ipa (ED
Fear [0] nom address output
Connect 0 pn
[paz [0] ROM address output
SS
reas fo]
ro
o
|
rar |
ra |
ees [= [not wed
Fs [p10 [ Reset signal for ADC
rar reo]
ol eat |= [not used
[2 [rc
T= [not used
ra [eco]
pas [rca [= [not wed
| 45 |
;
rae
Connect to +5V
Connect to +5V
P32
1 --}
Connect to +5V
'
w ~
Ley
|
i
| p23 | ~ | Connect to 4pin
=|
|
rs]
— nN
Pia | pst | —} Not used
BE SS Co a
OE
117 | Poo [1] ROM data input
sf
a9 | PED [Oo
}18|_p61 |i] Romdata input
sf
50] PeET_ [|
p19 | pez [1] ROM datainput
St]
RST [1 | Reset signal input
p20 { pcs {i | RoMdatainput
SZ]
XI [-| Connectto sev
a
0
re
es So
| - |
- |
= |
Request signal DSP IC (SIRQ)}
a
|
a
a
TPp0_[ | Reet signal for SP IC(RES)
Prot ]o)
Promo
=e
[os orf sw (omuTE)
Sd
Ready signal for DSP iC (SRDY)
Reset signal for DAC ( DARST)
Paa| rtp | Row
detainpat____] sf voo
[23 [72 |] ROM date inp
EI
aa [p73 [uf ROM date input
EI
| 25 | Pao
0 | OM address output
VSS
[27 |
oe Se)
uw)
w
8/8
=
Strobe for I1C201 (STB)
.
Seriat data for IC605, 201 (SICK)
Ready signal input which indicates that the
seria} input is on the execution (SIAK}
ROM address output
OM address output
it is high while processing data (BUSY).
-
Clock input ¢( CLK}
| ROM address output
.
oO |
Serial data for 1C605, 201 (Si)
| 58 |
Fi
OM address output
| 61 |
| 62 |
63 |
| 64 |
OM address output
OM address output
OM address output
ua por
d
DSP data input from IC301 (DATA)
rs]
uv mee N
(No.20435) 1-3
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