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PCH 1/9
5
BOOT HALT
JTAG ODT
ENABLE:LOW
DISABLE:LOW
ESPI FLASH SHARING MODE
MASTER ATTACHED FLASH SHARING:LOW
(INTERNAL WEAK PU)
(INTERNAL WEAK PU)
SLAVE ATTACEHD FLASH SHARING:HIGH
(INTERNAL WEAK PD)
3.3VA
3.3VA
SPI0_MOSI
SPI0_MISO
R128
R404
100K_04
*4.7K_04
SPI_SI_R
SPI_SO_R
GPP_H_12
D
R129
R431
*4.7K_04
*4.7K_04
GPP_H12
CONSENT STRAP
PESONALITY
STRAP
SPI_WP#
ENABLE:LOW
ENABLE:LOW
SPI_HOLD#
(INTERNAL WEAK PU)
(INTERNAL WEAK PU)
18
SPIO_IO2
SPIO_IO3
SPI_IO2
SPI_IO3
R430
R432
*4.7K_04
*1K_04
C
D02_12/04_H
Close to PCH Side
1V8_LDO
CNVI_BRI_RSP
20K_04
R699
34
CNVI_GNSS_PA_BLANKING
43,48
GPP_J1_C10#
CNVI_RGI_RSP
20K_04
R700
34
CNVI_BRI_DT
34
CNVI_BRI_RSP
34
CNVI_RGI_DT
34
CNVI_RGI_RSP
34
CNVI_MFUART2_RXD
34
CNVI_MFUART2_TXD
B
For ITE IT8587B Test
HSPI_MSI
R130
40
HSPI_MSI
HSPI_MSO
R435
40
HSPI_MSO
HSPI_SCLK
R422
40
HSPI_SCLK
HSPI_CE#
R433
40
HSPI_CE#
SPI_3.3V
Default
2
1
ME+BIOS ROM 16MB
VDD3
PJ48
*1mm
RTC Wake UP
U38
8
VDD
SI
A
C678
SO
SPI_WP#
0.1u_10V_X7R_04
R461
100K_04
3
WP#
CE#
SCK
SPI_HOLD#
R462
100K_04
7
HOLD#
VSS
GD25B127DSIGR
6-04-02564-492
5
4
3
U34A
BE36
12/04
GPP_A11/PME#/SD_VDD2_PWR_EN#
GPP_B13/PLTRST#
R15
RSVD2
GPP_K16/GSXCLK
R13
RSVD1
GPP_K12/GSXDOUT
GPP_K13/GSXSLOAD
GPP_K14/GSXDIN
AL37
VSS
GPP_K15/GSXSRESET#
AN35
T35
TP
SPI_SI_R
AU41
SPI_SO_R
SPI0_MOSI
GPP_E3/CPU_GP0
BA45
SPI_CS_0#
SPI0_MISO
GPP_E7/CPU_GP1
AY47
SPI_SCLK_R
SPI0_CS0#
GPP_B3/CPU_GP2
AW47
SPI0_CLK
GPP_B4/CPU_GP3
AW48
SPI0_CS1#
SPI_IO2
GPP_H18/SML4ALERT#
R434
33_04
AY48
SPI_IO3
SPI0_IO2
GPP_H17/SML4DATA
R436
33_04
BA46
SPI0_IO3
GPP_H16/SML4CLK
AT40
SPI0_CS2#
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
BE19
GPP_D1/SPI1_CLK/SBK1_BK1
GPP_H13/SML3CLK
BF19
GPIO4_1V8_MAIN_EN_R
GPP_D0/SPI1_CS#/SBK0_BK0
GPP_H12/SML2ALERT#
BF18
GPP_D3/SPI1_MOSI/SBK3_BK3
GPP_H11/SML2DATA
BE18
GPP_D2/SPI1_MISO/SBK2_BK2
GPP_H10/SML2CLK
BC17
D02_12/18_H
GPP_D22/SPI1_IO3
BD17
GPP_D21/SPI1_IO2
1 OF 13
HM370
U34M
BOARD_ID1
CNV_WR_CLKN
AW13
BOARD_ID2
GPP_G0/SD_CMD
CNV_WR_CLKP
BE9
TPM_DET
GPP_G1/SD_D0
BF8
GPP_G2/SD_D1
D02_12/18_H
BF9
SMI#_R
GPP_G3/SD_D2
BG8
T121
GPP_G4/SD_D3
BE8
GPP_G5/SD_CD#
BD8
GPP_G6/SD_CLK
AV13
1V8_LDO
GPP_G7/SD_WP
AP3
GPP_I11/M2_SKT2_CFG0
AP2
GPP_I12/M2_SKT2_CFG1
AN4
R140
GPP_I13/M2_SKT2_CFG2
AM7
20K_04
GPP_I14/M2_SKT2_CFG3
CNV_WT_RCOMP
AV6
GPP_J0/CNV_PA_BLANKING
AY3
R138
0_04
GPP_J1/CPU_VCCIO_PWR_GATE#
AR13
GPP_J11/A4WP_PRESENT
SD_RCOMP_1P8
D02_12/04_H
AV7
GPP_J10
SD_RCOMP_3P3
AW3
GPP_J_2
GPPJ_RCOMP_1P81
AT10
CNVI_BRI_DT
GPP_J_3
GPPJ_RCOMP_1P82
R427
33_04
AV4
GPP_J_4_CNV_BRI_DT_UART0_RTSB
GPPJ_RCOMP_1P83
AY2
CNVI_RGI_DT
GPP_J5/CNV_BRI_RSP/UART0_RXD
BA4
R159
33_04
GPP_J6/CNV_RGI_DT/UART0_TXD
AV3
GPP_J7/CNV_RGI_RSP/UART0_CTS#
AW2
GPP_J8/CNV_MFUART2_RXD
AU9
GPP_J9/CNV_MFUART2_TXD
13 OF 13
HM370
1V8_LDO
D02_12/04_H
SPI_SI_R
*0402_short-p
SPI_SO_R
*0402_short-p
SPI_SCLK_R
*0402_short-p
SPI_CS_0#
*0402_short-p
R161
20K_04
Close to Connector Side
CNVI_RGI_DT
D02_12/04_H
SPI_* = 1"~6.5"
SPI_SI_M
SPI_SI_R
5
R464
33_04
SPI_SO_M
SPI_SO_R
2
R460
33_04
SPI_CS0#
SPI_CS_0#
1
R459
0_04
SPI_SCLK_M
SPI_SCLK_R
6
R463
33_04
4
R703
100K_04
D02_12/04_H
4
3
2
BOARD_ID1
R163
10K_04
3.3VS
R154
*10K_04
BOARD_ID2
R165
*10K_04
3.3VS
R156
*10K_04
AV29
PLT_RST#
17,25
Y47
T105
Y46
T102
Y48
GPP_G_14_GSXDIN:
GPP_K_14_GSXDIN
W46
T100
DMI AC COUPLING FULL VOLTAGE MODE
AA45
WHEN SAMPLED LOW
3.3VS
EXTTS_SNI_DRV0
AL47
4
5
TCH_PNL_INTR#
AM45
3
6
BF32
2
7
EXTTS_SNI_DRV1
*10K_8P4R_04
BC33
1
8
RN5
AE44
SML4ALERT#
9/22
T23
AJ46
SML4DATA
T112
AE43
SML4CLK
T24
GPP_H15
AC47
AD48
SML3DATA
T22
AF47
SML3CLK
T101
GPP_H_12
AB47
AD47
SML2DATA
T108
AE48
SML2CLK
T103
BB44
INTRUDER#
R143
1M_04
VCC_RTC
INTRUDER#
BD4
CNVI_WGR_CLK_DN
34
BE3
CNVI_WGR_CLK_DP
34
BB3
CNV_WR_D0N
CNVI_WGR_D0N
34
BB4
CNV_WR_D0P
CNVI_WGR_D0P
34
BA3
CNV_WR_D1N
CNVI_WGR_D1N
34
BA2
CNV_WR_D1P
CNVI_WGR_D1P
34
BC5
CNVI_WT_CLK_DN
34
CNV_WT_CLKN
BB6
CNV_WT_CLKP
CNVI_WT_CLK_DP
34
BE6
CNV_WT_D0N
CNVI_WT_D0N
34
BD7
CNV_WT_D0P
CNVI_WT_D0P
34
BG6
CNV_WT_D1N
CNVI_WT_D1N
34
BF6
CNVI_WT_D1P
34
CNV_WT_D1P
BA1
150_1%_04
R428
PCIECOMP_N
B12
100_1%_04
R350
Mismatch
: +- 5 mils
PCIE_RCOMPN
PCIECOMP_P
A13
PCIE_RCOMPP
BE5
200_1%_04
R158
BE4
200_1%_04
R137
Place GND Shield (4 mils)
BD1
Avoid the CLK signal
BE1
BE2
200_1%_04
R139
Y35
RSVD2
Y36
RSVD3
D02_12/07_H
BC1
RSVD1
AL35
T37
TP
1V8_LDO
D02_12/04_H
GPIO
H: W / TPM
XTAL SELECT-1
L: W/O TPM
Enable CNVI
HIGH -> 24 MHZ
R438
LOW -> 38.4 MHZ
10K_04
Close to Connector Side
CNVI_BRI_DT
1V8_LDO
30
3.3VA
4,9,26,27,30,48
SPI_3.3V
30
VCC_RTC
27,30
Title
Title
Title
[24] PCH 1/12-SPI/SMBUS
[24] PCH 1/12-SPI/SMBUS
[24] PCH 1/12-SPI/SMBUS
3.3VS
8,9,20,21,22,23,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
VDD3
4,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53
Size
Size
Size
Document
Document
Document
Number
Number
Number
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
Date :
Date :
Date :
Friday, March 02, 2018
Friday, March 02, 2018
Friday, March 02, 2018
2
Schematic Diagrams
1
BOARD ID1
H: N85
L: N87
9/21
D
3.3VA
External pull-up is required.
Recommend 100K if pulled
Sheet 24 of 60
up to 3.3V
R405
100K_04
PCH 1/9
GPP_H15
C
R402
*20K_04
B
3.3VS
R164
10K_04
BIOS
TPM
TPM_DET
R155
*100K_04
W/O TPM
A
R e v
R e v
R e v
6-71-N85J0-D01
6-71-N85J0-D01
6-71-N85J0-D01
D02B
D02B
D02B
Sheet
Sheet
Sheet
24
24
24
o f
o f
o f
63
63
63
1
PCH 1/9 B - 25
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