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Schematic Diagrams
VDD1.0V, VCCIO
40,48,53
VTT_SELECT
low
high (V1.1S_VTT)
A
Sheet 43 of 60
VDD1.0V, VCCIO
B
V I N
0
V C C
0
E N
0
LP #
LP# Masked Area
0
Soft Start
V o
0
PG
C
0
D
B - 44 VDD1.0V, VCCIO
1
2
PJ17
VDD1_EN
TON_P1U1
PR138
100K_04
1
2
PR308
VDD3
OPEN
*CV-40mil
09/06
PU4
Default
PJ18
1
2
PR139
0_04
SLP_SUS#
OPEN
15
EN_PSV
*CV-40mil
VREG5
PC94
16
TON
PR140
*0_04
9/12
53
1.8VA_PGD
VTT VR Output Voltages
0.01u_16V_X7R_04
1.1 V
1
PR311
VOUT
1.05 V
2.2_04
VCC_PU1
2
VCC
PC96
VFB_PU1
3
VFB
1u_6.3V_X5R_04
4
PGOOD
6
AGND
VDD1.05A_PWRGD
VDD3
PR147
10K_04
G5602R41U
PR145
45.3K_1%_04
PC95
*15p_50V_NPO_04
PR146
100K_1%_04
Power 9/8
45
DDR 1.35V_PWRGD
22,25,35,40,42,45,48
3.3V
1mS
<240uS
PG Keep high during
LP#=0 period if no fault
occurs
PG on immediately
PG off once EN off
once Vo is settled
1
2
3
1A
VIN
9/19 power
820K_1%_06
PC99
PC255
PC100
+
+
PR141
PC98
0_06
0.1u_10V_X7R_04
PQ38
13
QM3004M3
BST
DH_PU1
PR149 0_06
12
4
DH
PL19
LX_PU1
BCIHP0730-3R3M
11
2
1
O.C.O 12A
LX
PCB Footprint = BCIHP0735A
ILIM_PU1
PR148
PQ41
10
4.02K_1%_04
QM3006M3
PD20
ILIM
EMC22
4
*1000p_50V_X7R_04
+
9
VDD
VREG5
for EMI
9/12
DL_PU1
8
DL
EMR14
9/12
*5.1_06
7
20mils-40mils
PC97
PGND
17
PGND
1u_6.3V_X5R_04
0.75V * (1+(40.2K/100K)) = 1.05V
D02_02/07_H
D02_01/03_H
24,48
GPP_J1_C10#
09/06
VIN
PC231
PC225
PC232
PU14
1
VIN
D02_02/26_A
VDD3
NB681GD-Z
*0.1u_10V_X5R_04
C365
PJ8
*CV-40mil
U10
PR111
100K_04
1
2
5
VDD3
EN
TC7SZ08FU
PJ57
1
4
1
2
2
SUSB#
*1mm
PC83
3.3V
3.3V
DEFAULT SHORT
D02_12/06_Henry
*0.01u_50V_X7R_04
C1_VCCIO_VR
PR122
PR123
3
C1
*20K_04
20K_04
C1_VCCIO_VR
C0_VCCIO_VR
4
PR121
10K_04
C0
C0_VCCIO_VR
3.3V
PR120
10K_04
PR119
PR287
20K_04
10K_04
25
VCCIO_PWRGD
AGND_VCCIO
LP #
C 1
C 0
V CCI O
E N
LP #
OUTP UT
PG
0
X
X
0V
0
0
0 V, Off
LOW
1
0
0
0.85V
0
1
0 V, Off
LOW
1
0
1
0.875V
Normal turn on
Asserted when
and fall to LP#
output reaches
target value after
nominal voltage
1
0
PG + 1 ms
and remains high
1
1
0
0.95V
during LP# = 0
1
1
1
0.975V
1
1
HI G H
Remains asserted
after SS
3
4
5
1.05VA
6A
V1.05A
1.05VA
PJ53
1
2
SHORT
*3mm
Default
PR307
*0_12
PR109
3.3_06
VCCIO
R162
0_04
PC82
0.22u_10V_X5R_04
PL15
VCCIO
BCIHP0735-R68M
7A
PJ46
*4mm
VCCIO_R
8
1
2
SW
PCB Footprint = BCIHP0735A
6-19-41001-234
PC220
PC237
PC238
PC233
PC234
PC235
DEFAULT SHORT
9/12
PR288
+
12
VOUT
*100_04
PJ56
*1mm
D02_12/06_Henry
PJ44
*1mm
1
2
2
VCCIO_SENSE
PGND
PR289
PR110
0_04
PJ45
*1mm
0_04
1
2
11
VSSIO_SENSE
AGND
Default
AGND_VCCIO
AGND_VCCIO
3.3V
PR290
5.1_06
PC226
1u_6.3V_X5R_04
AGND_VCCIO
1.05VA
30,48
VCCIO
2,6
VDD3
4,24,25,27,30,34,36,37,40,42,44,48,50,51,52,53
Title
Title
Title
VIN
22,27,42,44,45,46,47,49,50,51,52
[43] VDD1.0V, VCCIO
[43] VDD1.0V, VCCIO
[43] VDD1.0V, VCCIO
VDD5
35,42,44
1.05_VCCST
4,6,26,47,48
Si ze
Si ze
Si ze
Document
Document
Document
Number
Number
Number
VREG5
44
6-71-N85J0-D01
6-71-N85J0-D01
6-71-N85J0-D01
A2
A2
A2
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
5V
22,35,37,42,45,46,47,48,49,52,53
3.3V
2,17,22,33,35,42,45,47,48
Dat e:
Dat e:
Dat e:
Friday, March 02, 2018
Friday, March 02, 2018
Friday, March 02, 2018
4
5
A
B
6
6
C
D
R e v
R e v
R e v
D02B
D02B
D02B
Sheet
Sheet
Sheet
43
43
43
o f
o f
o f
63
63
63
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