Integrated Peripherals - Supermicro SUPER P4SBA+ User Manual

S
UPER P4SBA+/P4SBA/P4SBM User's Manual
[Delay Prior to Thermal]
If enabled, the information regarding theVideo BIOS stored in the
BIOS ROM (Read Only Memory) chip will be written and temporarily
stored in the "cacheable" memory section of the CPU, so the CPU
has faster access to the information. The settings are: "Enabled"
or "Disabled." The default setting is "Enabled."
[Memory Hole at 15M-16M]
To improve the performance of the sytem, a certain section of the
memory will be reserved for the use of the devices installed in the
PCI slots. This section of memory must be mapped into the memory
space below 16MB.
The default setting is "15M16M."
4-4.3
When the item "Integrated Peripherals" is highlighted, press the <Enter> key
to activate the following sub-menu screen.
The settings are: "15M-16M" and "Disabled."

Integrated Peripherals

4-12