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Board Level Integration
Xilinx understands the critical issues such as complex board layout, signal integrity, high-
speed bus interface, high-performance I/O bandwidth, and electromagnetic interference
for system level designers.
To ease the system level designers' challenge, ISE provides support to all Xilinx leading
FPGA technologies:
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To really help you ensure your programmable logic design works in context of your entire
system, Xilinx provides complete pin configurations, packaging information, tips on signal
integration, and various simulation models for your board level verification including:
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Embedded Development Kit
The Embedded Development Kit (EDK) is Xilinx's solution for embedded programmable
systems design and supports designs using the Virtex-II Pro. EDK hardware and software
development tools, combined with the advanced features of Virtex-II Pro FPGA provide
you with a new level of system design.
The system design process can be loosely divided into the following tasks:
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System IO
XCITE
Digital clock management for system timing
EMI control management for electromagnetic interference
IBIS models
HSPICE models
STAMP models
Build the software application
Simulate the hardware description
Simulate the hardware with the software application
Simulate the hardware into the FPGA using the software application in on-chip
memory
Run timing simulation
Configure the bitstream for the FPGA
www.xilinx.com
1-800-255-7778
Get other manuals https://www.bkmanuals.com
Chapter 1: Introduction to Virtex-II Pro, ISE, and EDK
ML310 User Guide
UG068 (v1.01) August 25, 2004
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