Setting Up The Vc7222 Board For Gth And Gtz Ibert Testing; Extracting The Project Files - Xilinx Virtex-7 FPGA VC7222 Getting Started Manual

Setting Up the VC7222 Board for GTH and GTZ
IBERT Testing
The VC7222 board can be damaged by electrostatic discharge (ESD). Follow standard ESD
CAUTION!
prevention measures when handling the board.
When the VC7222 board ships from the factory, it is already configured for the GTH IBERT
demonstration described in this chapter. If the board has been re-configured, it must be
returned to the default setup before running the IBERT demonstrations.
1. Move all jumpers and switches to their default positions. The default jumper and switch
positions are listed in Virtex-7 FPGA VC7222 GTH and GTZ Transceiver Characterization
Board User Guide (UG965)
2. Install the GTH and GTZ transceiver power modules into connectors J29 – J102, and J5
and J71, respectively.
3. Install the SuperClock-2 module:
a. Align the three metal standoffs on the bottom side of the module with the three
mounting holes in the SuperClock-2 module interface of the VC7222 board.
b. Using three 4-40 x 0.25 inch screws, firmly screw down the module from the bottom
of the VC7222 board.
c. On the SuperClock-2 module, place a jumper across pins 2 - 3 (2V5) of the CONTROL
VOLTAGE header, J18, and place another jumper across Si570 INH header J11.
d. Screw down a 50Ω SMA terminator onto each of the six unused Si5368 clock output
SMA connectors: J7, J8, J12, J15, J16, and J17.

Extracting the Project Files

The Vivado project files required to run the IBERT demonstration are located in
rdf0297-vc7222-ibert-2015-1.zip on the SD card provided with the VC7222 board.
These files are also available online at the
documentation
VC7222 IBERT Getting Started Guide
UG971 (Vivado Design Suite v2015.1) April 27, 2015
[Ref 1].
website.
www.xilinx.com
Chapter 1: VC7222 IBERT Getting Started Guide
Virtex-7 FPGA VC7222 Characterization Kit
7
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