Block Diagram - Sony Jumbotron JME-UA200 Service Manual

Unit alignment controller
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BLOCK DIAGRAM

1, 2
3, 4
SENSOR
5-8
11, 18
2, 3
COM
4, 5
1, 6
SIGNAL
2-5
OUT
7-10
JME-UA200
UCI, UCK, UCM
SECTION 8
CN6
CN2
CLS0, CLS1
CLS0, 1
17
18
SS0, SS1
FILTER
SS0, 1
19
FL1
BLSO-BLS3
20
21
BLSO-3
AN0-AN7
24
27
AN0-7
FILTER
FL2
34
CN7
13
TXD, RXD
14
TXD, RXD
RS, CS
15
BS, CS
RS, CS
FILTER
16
FL3
U-RTN+, –
1
6
CN5
U-RTN+, U-RTN–
2
SO1+ - SO4+
SO1+ - 4+
FILTER
5
SO1– - SO4–
SO1– - 4–
FL4
7
10
UCI
(INTER FACE BOARD)
S201
S208
S215
S222
0
7
E
SPG
CN1
LAN0
1
2
S202
S209
S216
S223
LAN1
3
ADJUST
1
8
F
4
LAN2
5
6
LAN1
LAN3
7
S203
S210
S217
S224
8
UNIT
UP
LAN4
9
2
9
CONTROL
10
10
LAN5
11
11
LAN2
12
12
LAN6
13
13
S204
S211
S218
S225
14
14
DOWN
3
A
DEMO
LAN3
S205
S212
S219
S226
CLM0
15
15
16
16
LEFT
4
B
ENTER
CLM1
17
17
18
18
LAN4
CLM2
19
19
20
20
S206
S213
S220
S227
21
21
CLM3
RIGHT
5
C
WRITE
22
22
LAN5
S207
S214
S221
S228
HOLD
6
D
SET UP
LAN6
UCK (KEY BOARD)
AC IN
SWITCHING
REGULATOR
UCI, UCK, UCM
IC50
UCM (MAIN BOARD)
SENSOR CONTROL
CN2
17
CLS0, 1
A0-7
12
1Q
1D
2
18
19
SS0, 1
19
8Q
8D
9
20
21
BLSO-3
CS6
CLK
11
24
27
AN0-7
34
13
TXD, RXD
14
RS, CS
15
16
U-RTN+
1
U-RTN+, U-RTN–
1
IA
U-RTN–
U-RTN
6
2
3
IA
OA
IC35
LINE RECEIVER
2
SO1+ - 4+
5
SO1– - 4–
7
10
IC48
KEY DATA BUFF
CN1
2
A1
Y1
12
D0-6
1
KEY SCAN OUT0
A8
18
2
8
Y8
KEY SCAN OUT1
3
RD
G1
1
4
PROGRAM
CS7
5
KEY SCAN OUT2
ROM
G2 19
6
IC51
7
KEY SCAN OUT3
8
KEY SCAN OUT4
9
IC49
KEY ADR BUFF
KEY SCAN OUT5
A0-3
KEY SCAN OUT6
15
Y1
A1
2
18
Y4
A4
5
RD
G1
1
CS7
G2 19
KEY SCAN IN0
IC33
IC34
PARALLEL-SERIAL
KEY SCAN IN1
LINE DRIVER
CONVERTOR
KEY SCAN IN2
2
PI 0
28
DL0-9
1Y
10-10
6
PI 18
KEY SCAN IN3
39
SIGNAL
10
4Y
1
CONV.
SO 0
14
SC 0-1
11
1A
7
SO 1
4A
14
9
3
IC31, 32
15
1Z
5
16
43
4Z
11
13
DMA17
IC2(1/4)
1
PAL CLOCK
3
2
GATE
IC1(1/6)
x1
2
INV
18.75
IC3(1/2)
IC2(3/4)
MHz
CN4
DIVIDER
CLOCK GATE
1
5V
1
Q
3
CK
5
2
IC2(2/4)
NTSC CLOCK GATE
x2
18.88MHz
8-1
8-1
IC40
MICRO CONTROLLER
X3
19.660MHz
75
XTAL
RES
71
74
EXTAL
AN0-7
AN0
86
PC1
12
93
AN7
PC0
11
TXD
TXD1
5
T1OUT
T1IN
2
21
TXD1
RXD
RXD1
4
R1IN
R1OUT
3
23
RXD1
HWR
79
RS
RS1
18
T2OUT
T2IN
1
24
RD
78
RS1
CS
CS1
19
R2IN
R2OUT
25
CS1
PB0
2
20
PB1
3
IC53
PB2
4
DRIVER/RECEIVER
U-RTN
22
RXDO
PB3
5
PB4
6
MA0
A0-17
MAO-19
45
ADDRESS
PA7
112
BUFF
65
MA19
IC44, 45
IC41-43
13
CS0
MD0
16
27
DATA
CS7
101
BUFF
43
MD15
104
FLASH
SRAM
IMAGE
MEMORY
DATA
RAM
IC52
IC52
IC54
IC38
IC22-24
EX OR
DO0-2
EX OR
DO0-9
DMA2
BUFF
IC13, 14
G1
IC25,26
LINE ADR
DATA
DOH0-9
DOH0-9
LATCH
A10
3Q
3D
IC29, 30
IC11, 12
DO0-9
SYNC
EOF
BUFF
G1
IC27, 28
3
4
IC36(3/4)
IC21
IC37(2/5)
FN MODE SET
SYNC OR EOF
INV.
IC20(4/4)
10
WD5
8
IC37(4/5)
ADP GATE
WD0
4
PR
12
INV.
13
9
11
CK
11
1
10
WD1
8
Q
CK
IC20(2/4)
IC37(1/5)
BLOCK GATE
WD4
3
INV.
6
5
IC37(5/5)
4
12
2
1
5
INV.
4
8
10
5
13
6
IC37
9
6
VD GATE
(3/5)
IC20(3/4)
IC36(2/4)
2
INV.
1
FN GATE
FN GATE
3
12
13
2
1
IC36(1/4)
11
FN GATE
IC36(4/4)
3
DATA
SYNC BINARY
GATE
DMA0-17
COUNTER
IC1, 4, -10
IC55
5V
SYSTEM
RESET
3
1
LCDINH
20
LCDRES
1
HWR
RD
Y1
18
2
RD
HWR
A1
2
Y2
3
17
9
A8
NPS
CS5
Y3
6
16
FNC
A0
Y4
15
7
8
IC46
D0-7
CONTOL BUFF
15
IC47
CS BUFF
A1
Y1
CS0-7
2
11
9
A8
Y8
18
FN DATA
RAM
IC39
IC15(1/2)
6
FO
GATE
1, 2, 4, 5
DMA7-14
DMA11-14
DATA
BUFF
DMA15, 16
BLOCK
DATA
BUFF
8
WMA3-6
9-13
IC15(2/2)
SYNC GATE
WORD
DMA3-6
DECODER
IC18
DMA9,10,12
NTSC
15-17
VD GATE
DMA7,9,10
PAL
14-17
VD GATE

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