Primary Delay Filter Time; Pid Output Frequency Limit; Pid Feedback Signal Detection Time - Delta Electronics AC Motor Drive VFD-EL User Manual

Chapter 4 Parameters|
This parameter defines an upper bound or limit for the integral gain (I) and therefore limits the
Master Frequency.
The formula is: Integral upper bound = Maximum Output Frequency (Pr.01.00) x (Pr.10.05).
This parameter can limit the Maximum Output Frequency.
10.06

Primary Delay Filter Time

Settings
To avoid amplification of measurement noise in the controller output, a derivative digital filter is
inserted. This filter helps to dampen oscillations.
The complete PID diagram is in the following:
+
Setpoint
-
Input Freq.
Gain
10.10
10.07

PID Output Frequency Limit

Settings
This parameter defines the percentage of output frequency limit during the PID control. The
formula is Output Frequency Limit = Maximum Output Frequency (Pr.01.00) X Pr.10.07 %.
This parameter will limit the Maximum Output Frequency. An overall limit for the output
frequency can be set in Pr.01.07.

PID Feedback Signal Detection Time

10.08
Settings
This function in only for ACI signal.
This parameter defines the time during which the PID feedback must be abnormal before a
warning (see Pr.10.09) is given. It also can be modified according to the system feedback
signal time.
If this parameter is set to 0.0, the system would not detect any abnormality signal.
4-102
0.0 to 2.5 sec
P I
10.02 10.03
D
10.04
0 to 110 %
0.0 to d 3600 sec
+
Integral
Output
gain +
Freq.
limit
Limit
10.05
+ 10.07
PID
feedback
10.01
Revision August 2008, 2ELE, V1.02
Unit: 0.1
Factory Setting: 0.0
Digital
Freq.
filter
Command
10.06
Unit: 1
Factory Setting: 100
Unit: 0.1
Factory Setting: 60.0