Recommended Memory Configurations; Table 5. Recommended Ddr4 Dimm Per Socket Population Configurations - Intel M20NTP1UR System Integration And Serive Manual

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Intel® Server System M20NTP1UR - System Integration and Service Guide
For best system performance in dual processor configurations, installed DDR4 DIMM type and
population configured to CPU 1 must match DDR4 DIMM type and population configured to CPU 0.
For best system performance, memory should be installed in all eight channels for each installed
processor.
Mixed DDR4 DIMM population rules:
o Mixing DDR4 DIMMs of different frequencies and latencies is not supported within or across
processors. If a mixed configuration is encountered, the BIOS attempts to operate at the highest
common frequency and the lowest latency possible.
o Mixing of DDR4 DIMM types (RDIMM, LRDIMM, 3DS-RDIMM, 3DS-LRDIMM) within or across
processors is not supported. This condition is a Fatal Error Halt in Memory Initialization.

Recommended Memory Configurations

The following table identifies the recommended DIMM population configurations by memory slot based on
the desired number of DIMMs to be supported by each installed processor. For best system performance in a
dual processor configuration, installed memory type and population configured to CPU 1 must match
memory type and population configured to CPU 0.

Table 5. Recommended DDR4 DIMM per Socket Population Configurations

IMC-2
# of DIMMs
CH F
Slot 0
1
2
4
6
DIMM
8
DIMM
Note: Intel does not support nor will it provide support for systems populated with "Un-like" (non-matching)
DIMMs. However, the system may still operate if all the mixed DDR4 DIMM population rules are followed.
Validation and support of these configurations is the sole responsibility of the original system integrator.
For best compatibility and system operation, Intel highly recommends that all installed DIMMs have
"identical" or "like" attributes as defined in the following Intel DDR4 support disclaimer.
88
IMC-3
CH E
CH H
Slot 0
Slot 0
DIMM
DIMM
DIMM
DIMM
DIMM
IMC -1
CH G
CH C
Slot 0
Slot 0
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
IMC-0
CH D
CH A
Slot 0
Slot 0
DIMM
DIMM
DIMM
DIMM
DIMM
DIMM
CH B
Slot 0
DIMM
DIMM

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