Chapter 1: Device Packaging Overview; Device/Package Combinations And Available I/Os - Xilinx Virtex-4 QV FPGA Manual

R
Device Packaging Overview
This section describes the pinouts for Virtex-4 QV Radiation Hardened FPGAs in 1.00-mm
pitch ceramic flip-chip column grid array (CF) packages. Virtex-4 QV Radiation Hardened
FPGAs are offered exclusively in ceramic flip-chip column grid array (CF) packages that are
optimally designed for improved thermal cycle reliability. All of these packages are pinout
compatible with a commercial grade equivalent BGA
Each device I/O ring is split into eight or more I/O banks to allow for flexibility in the
choice of I/O standards (see UG070,Virtex-4 User Guide). Global pins, including JTAG,
configuration, and power/ground pins, are listed at the end of each table.
provides the definitions for all pin types.
Note:

Device/Package Combinations and Available I/Os

Table 1-1
Table 1-1: Ceramic Flip-Chip Packages and Compatible BGA
Compatible BGA
Table 1-2
FPGA. The number of I/Os per package includes all user I/Os except the fifteen control
pins (CCLK, DONE, M0, M1, M2, PROG_B, PWRDWN_B, TCK, TDI, TDO, TMS,
HSWAPEN, DXN, DXP, AND RSVD).
Virtex-4 QV FPGA Ceramic Packaging
UG496 (v1.1) June 8, 2012
Check www.xilinx.com
lists the available CF packages and their pin compatible flip-chip packages.
Ceramic Package
Pitch
Size 35 mm
XQR4VSX55
XQR4VFX60
XQR4VFX140
XQR4VLX200
lists the number of available I/Os and differential I/O pairs for each Virtex-4 QV
www.xilinx.com
for the latest pinout information.
CF1140 CF1144
1.00 mm 1.00 mm
×
35 mm 35 mm
FF1148
Chapter 1
(Table 1-1).
Table 1-3
CF1509
1.00 mm
× ×
35 mm 40 mm
FF1152
FF1517
FF1513
40 mm
9