Fpga Mezzanine Card Interface - Xilinx KC705 User Manual

Chapter 1: KC705 Evaluation Board Features
Configuration Mode and Upper Linear Flash Address Switch (SW13)
[Figure
FPGA Configuration Mode: DIP switch SW13 positions 3, 4, and 5 control which
configuration mode is used at power-up or when the PROG pushbutton is pressed.
Linear BPI Flash Upper Addresses: DIP switch SW13 positions 1 and 2 control the setting
of address bits FLASH_A25 and FLASH_A24. The mode signals FPGA_M2, _M1 and _M0
are connected to FPGA U1 pins AB1, AB2 and AB5 respectively. The BPI flash memory U58
address signals FLASH_A24 AND FLASH_A25 are connected to FPGA U1 pins M23 and
M22 respectively. Configuration mode is used at power-up or when the PROG pushbutton
is pressed.
Figure 1-34
X-Ref Target - Figure 1-34

FPGA Mezzanine Card Interface

[Figure
The KC705 board supports the VITA 57.1 FPGA Mezzanine Card (FMC) specification by
providing subset implementations of a high pin count (HPC) connector at J22 and a low
pin count (LPC) connector at J2. Both connectors use the same 10 x 40 form factor, except
the HPC version is fully populated with 400 pins and the LPC version is partially
populated with 160 pins. Both connectors are keyed so that a the mezzanine card faces
away from the KC705 board when connected.
Signaling Speed Ratings:
•
•
•
•
The Samtec connector system is rated for signaling speeds up to 9 GHz (18 Gb/s) based on
a -3 dB insertion loss point within a two-level signaling environment.
54
1-2, callout 29]
shows the SW13 circuit.
FLASH_A25
FLASH_A24
FPGA_M2
FPGA_M1
FPGA_M0
R396
1.21kΩ
0.1 W
1%
R397
1.21kΩ
0.1 W
1%
GND
Figure 1-34: Configuration Mode and Upper Linear Flash Address Switch
1-2, callout 30 - 31]
Single-ended: 9 GHz (18 Gb/s)
Differential Optimal Vertical: 9 GHz (18 Gb/s)
Differential Optimal Horizontal: 16 GHz (32 Gb/s)
High Density Vertical: 7 GHz (15 Gb/s)
www.xilinx.com
VCC2V5
SW13
10 1
2
9
8 3
4
7
6 5
SDA05H1SBD
R398 R400
1.21kΩ 1.21kΩ
0.1 W 0.1 W
1% 1%
R399
1.21kΩ
0.1 W
1%
R401 R402
220Ω 220Ω
0.1 W 0.1 W
1% 1%
UG810_c1_28_011912
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013