Clock Generation - Xilinx KC705 User Manual

X-Ref Target - Figure 1-9
VCC3V3
U59
Digilent
USB-JTAG
Module
R381 15Ω
TDI
R382 15Ω
TMS
R380 15Ω
TCK
TDO
VCC3V3
J60
JTAG
Header
JTAG_TDI
TDI
JTAG_TMS
TMS
JTAG_TCK
TCK
JTAG_TDO
TDO

Clock Generation

There are five clock sources available for the FPGA fabric on the KC705 board (refer to
Table
Table 1-8: KC705 Board Clock Sources
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013
U5
SN74LV541A
Voltage
Translator
VCC3V3
U69
SN74AVC2T45
Translator
Figure 1-9: JTAG Circuit
1-8).
Clock Name Reference
System Clock
User Clock
www.xilinx.com
FMC_TDI_BUF
FMC_HPC_PRSNT_M2C_B
FMC_TMS_BUF
FMC_HPC_TCK_BUF
VCC3V3
LPC_PRSNT_M2C_B
FMC_LPC_PRSNT_M2C_B
VCC3V3
VCC2V5
Voltage
FPGA_TMS_BUF
FPGA_TCK_BUF
FPGA_TDO
SiT9102 2.5V LVDS 200 MHz Fixed Frequency
U6
Oscillator (Si Time). See
Si570 3.3V LVDS I
U45 (Silicon Labs). Default power-on frequency 156.250
MHz. See Programmable User Clock Source, page
Feature Descriptions
VCC3V3
HPC_PRSNT_M2C_B
U76
FMC_HPC_TDO
U77
FMC_LPC_TDO
FMC_LPC_TMS_BUF
FMC_LPC_TCK_BUF
U1
VCC2V5
Kintex-7
U102
SN74AVC1T45
Voltage
Translator
TDI
TMS
TCK
TDO
UG810_c1_08_012012
Description
System Clock Source, page
2
C Programmable Oscillator
J22
FMC HPC
Connector
PRSNT_L
TDI
TDO
TMS
TCK
J2
FMC LPC
Connector
PRSNT_L
TDI
TDO
TMS
TCK
FPGA
24.
25.
23