Epson Stylus PHOTO 950 Service Manual page 49

EPSON Stylus PHOTO 950
The following figure shows the structure of the reset circuit.
+42V
IC12
8H6150F
NC1 MAES
TP1 IN VCC
NC2 OUT1
GND OUT2
C25
C23
0.1U
0.1U
Figure 2-30. Reset Circuit Block Diagram
+5V line reset circuit
The 5V line is monitored at the VCC port of IC12, and if an abnormal voltage
(4.2V or less) is detected, a reset signal for the 2-in-1 CPU-ASIC is output from
the OUT2 port.
+42V line reset circuit
The 42V line is monitored at the IN port of IC12, and if an abnormal voltage
(36.3V or less) is detected, a reset signal for the 2-in-1 CPU-ASIC is output from
the OUT1 port.
OPERATING PRINCIPLES
IC6
CPU-ASIC
+5V
2 in 1
E01A28CA
MAES
NMILVL
RESET
TP2
Electrical Circuit Operating Principles
EEPROM CONTROL CIRCUIT
Since EEPROM is nonvolatile memory, it keeps written information if the printer
power is turned off. When the printer is turned ON, CPU (IC6) reads data from
EEPROM (IC13) via the RAM and when the power is turned OFF it stores data to
EEPROM via the RAM.
EEPROM is connected to CPU with 4 lines and each line has the following function.
CE : Chip selection signal
SK : Data synchronism clock pulse
DI : Data writing line (serial data) at power off.
DO : Data reading line (serial data) at power on.
IC13
EEPROM
CS
VCC
NC SK
ORG DI
DO
GND
C26
0.1U
Figure 2-31. EEPROM Circuit Diagram
Revision A
IC6
CPU-ASIC
2 in 1
E01A28CA
C_P13/IEEEINT
C_P15/INT1_PFDCU
C_P16/INT0_PFDCU
C_P17/0_TMA3
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