Signal Connections For 4-Wire Jtag Communication - Texas Instruments MSP430 User Manual

MSP-GANG430 Target Connector Signals
J1 (see Note A)
J2 (see Note A)
VCC TOOL
2
VCC TARGET
4
6
TEST/VPP
8
10
12
14
A Make either connection J1 (if a local target power supply is used) or connection J2 (if the target is powered from the
debug/programming adapter).
B The RST/NMI pin R1/C1 configuration is device-family dependent. See the respective MSP430 family user's guide for
the recommended configuration. When using 2-wire JTAG communication on capable devices in 4-wire JTAG mode,
the upper limit for C1 should not exceed 2.2 nF. This applies to both TI FET interface modules (LPT/USB FET).
C The TEST/VPP pin is available only on MSP430 family members with multiplexed JTAG pins. See the device data
sheet to determine pin availability.
D The connection to the JTAG connector RST pin is optional when using devices that are capable of only 4-wire JTAG
communication mode, and it is not required for device programming or debugging. However, this connection is
required when using devices that are capable of 2-wire JTAG communication mode in 4-wire JTAG mode.
Figure 5-3. Signal Connections for 4-Wire JTAG Communication
60
Hardware
V
CC
R1
Ω
47 k
(see Note B)
JTAG
TDO/TDI
1
TDI/VPP
3
TMS
5
TCK
7
GND
9
RST (see Note D)
11
13
C1
10 nF/2.2 nF
(see Note B)
Copyright © 2003–2010, Texas Instruments Incorporated
V /AV /DV
C3
C2
0.1 µF
10 µF
RST/NMI
TDO/TDI
TDI/VPP
TMS
TCK
TEST/VPP (see Note C)
V /AV /DV
SLAU101O – March 2003 – Revised May 2010
www.ti.com
CC CC CC
MSP430Fxxx
SS SS SS