Chapter 2
Theory of Operation
Analog Output and Timing Circuitry
DAQ-STC
Data Bus
PCI E Series RLPM
Refer to the DAQ-STC Technical Reference Manual and the NI-DAQ
Function Reference Manual for more information on analog triggering.
For a detailed description of these modes, and timing diagrams, and for a
description of other modes not discussed here, refer to the DAQ-STC
Technical Reference Manual.
The PCI E Series boards (except the PCI-6023E, PCI-6032E and
PCI-6033E) have two analog output channels and a timing core within the
DAQ-STC that is dedicated to analog output operation. Figure 2-17 shows
a general block diagram for the analog output circuitry.
LDAC0*
DAC0WR*
LDAC1*
DAC1WR*
FIFO
FIFO
Bypass
+10 V Reference
Figure 2-17. Analog Output Circuitry Block Diagram
DAC0
DAC1
2-20
DAC0OUT
DAC1OUT
Extref
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