National Instruments PCI E Series Programmer's Manual page 162

PCI-MIO-16E-1, PCI-MIO-16E-4,
and PCI-6071E, 2-1
PCI-MIO-16XE-10,
PCI-MIO-6052E, and
PCI-6031E, 2-2
PCI-MIO-16XE-50, 2-5
components of PCI E Series boards, 2-5
data acquisition timing circuitry,
2-11 to 2-18
ADC timing (figure), 2-12
block diagram, 2-8
data acquisition sequence timing,
2-12 to 2-18
multirate scanning with ghost,
2-16 to 2-18
multirate scanning without ghost,
2-14 to 2-16
single-read timing, 2-11 to 2-12
timing of scan (figure), 2-14
digital I/O circuitry, 2-24
functional overview, 2-1 to 2-5
PCI interface circuitry, 2-6 to 2-7
posttrigger and pretrigger acquisition,
2-18 to 2-19
RTSI bus interface circuitry, 2-25 to 2-26
timing I/O circuitry, 2-24 to 2-25
timing circuitry
analog output, 2-22 to 2-24
data acquisition, 2-11 to 2-18
ADC timing (figure), 2-12
block diagram, 2-8
data acquisition sequence timing,
2-12 to 2-18
multirate scanning with ghost,
2-16 to 2-18
multirate scanning without ghost,
2-14 to 2-16
single-read timing, 2-11 to 2-12
timing of scan (figure), 2-14
timing I/O circuitry
DAQ-STC counter diagram, 2-24
© National Instruments Corporation
theory of operation, 2-24 to 2-25
trigger lines, RTSI, 4-52
triggering
analog triggering
programming considerations,
4-52 to 4-56
theory of operation, 2-19 to 2-20
posttrigger and pretrigger acquisition,
2-18 to 2-19
U
Unip/Bip bit, 3-10
unipolar output, 2-21
update interval counter (UI), 2-23
UPDOWN signal, timing I/O circuitry, 2-25
W
waveform generation
programming examples
with external UPDATE and external
trigger, 4-41 to 4-43
with polled writes, 4-34 to 4-39
using interrupts, 4-43 to 4-44
using local buffer mode, 4-41 to 4-43
theory of, 2-23 to 2-24
windowed registers
digital I/O programming example, 4-7
programming considerations, 4-5
register map, 3-2
I-11
Index
PCI E Series RLPM