Low Power Modes; Stop Mode; Timer During Stop Mode - Motorola MC68HC05T16 Technical Data Manual

The STOP and WAIT instructions have different effects on the Programmable Timer, M-Bus, Pulse
Accumulator, PWM, OSD, and ADC. These are discussed in the following paragraphs.
12.1

Stop Mode

This is the lowest power consumption mode for the MCU. When the processor executes the STOP
instruction, the internal clock is turned off. This halts all internal CPU processing, including the
operation of the Programmable Timer, M-Bus, Pulse Accumulator, PWM, OSD, and ADC. The I bit
in the Condition Code register is cleared to enable external interrupt IRQ. All registers and
memory remain unaltered, and all input/output lines remain unchanged.
The MCU is exited from Stop mode by an interrupt on IRQ, or any resets (logic low on RESET pin
or a power-on reset). On exit from Stop mode, the program counter is loaded with the
corresponding interrupt vector (see Table 5-1). The effects of the Stop mode on each of the MCU
peripheral systems are below.
12.1.1

Timer during Stop Mode

When Stop mode is entered, the timer counter stops counting (the internal processor clock is
stopped) and remains at that particular count value until Stop mode is exited. If the exit was
caused by reset, the counter is forced to $FFFC. If the Stop mode is exited by an interrupt IRQ,
the counter resumes counting from the value when it entered the Stop mode. Another feature of
the programmable timer in the Stop mode is, that if at least one valid input capture edge occurs at
the TCAP pin, the input capture detect circuitry is armed. This action does not set any timer flags
or "wake up" the MCU, but when the MCU does "wake up" there will be an active input capture flag
(and data) from that first valid edge which occurred during the Stop mode. Notice that an exit by
a reset will reset the entire MCU and thus, this function on the TCAP will not happen.
MC68HC05T16
12

LOW POWER MODES

LOW POWER MODES
12
TPG
MOTOROLA
12-1