C
A P P E N D I X
Functional Description
This appendix provides a functional description of the Sun Blade 150 system.
Section C.1, "System" on page C-1
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Section C.2, "Motherboard" on page C-3
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Section C.3, "Riser Board" on page C-4
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Section C.4, "Jumper Descriptions" on page C-5
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Section C.5, "Motherboard Components" on page C-6
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Section C.6, "Reset Types" on page C-13
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Section C.7, "Clocking" on page C-13
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Section C.8, "Power Control" on page C-15
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Section C.9, "Memory Architecture" on page C-18
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Section C.10, "Address Mapping" on page C-22
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Section C.11, "Interrupts" on page C-25
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Section C.12, "Power" on page C-25
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C.1
System
The Sun Blade 150 system is an UltraSPARC port architecture-based uniprocessor
machine that uses the peripheral component interconnect (PCI) as the I/O bus. The
CPU and ATI graphics ASIC communicate with each other using the PCI protocol.
The following figure shows a functional block diagram of the system.
C-1