Supermicro X11SCZ-F/Q User Manual page 74

Table of Contents

Advertisement

Super X11SCZ-F/-Q User's Manual
C6DRAM
Select Enabled to activate moving the DRAM contents to PRM memory when the CPU is in
the C6 state. The options are Disabled and Enabled.
Hardware Prefetcher
If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L2 cache to improve CPU performance. The options are Disabled
and Enabled.
Adjacent Cache Line Prefetch
The CPU prefetches the cache line for 64 bytes if this feature is set to Disabled. The CPU
prefetches both cache lines for 128 bytes as comprised if this feature is set to Enabled. The
options are Disabled and Enabled.
Intel (VMX) Virtualization Technology
Use this feature to enable the Vanderpool Technology. This technology allows the system to
run several operating systems simultaneously. The options are Disabled and Enabled.
Active Processor Cores
This feature determines how many CPU cores will be activated for each CPU. When all is
selected, all cores in the CPU will be activated. The options are All and 1, 2, 3, 4, and 5.
Hyper-Threading (ALL)
Select Enabled to support Intel Hyper-threading Technology to enhance CPU performance.
The options are Disable and Enable.
AES
Select Enabled for Intel CPU Advanced Encryption Standard (AES) instructions support to
enhance data integrity . The options are Disabled and Enabled.
Boot Performance Mode
This feature allows the user to select the performance state that the BIOS will set before the
operating system handoff. The options are Power Saving, Max Non-Turbo Performance,
and Turbo Performance.
Intel ® SpeedStep™
Intel SpeedStep Technology allows the system to automatically adjust processor voltage and
core frequency to reduce power consumption and heat dissipation. The options are Disabled
and Enabled.
Intel ® Speed Shift Technology
Use this feature to enable or disable Intel Speed Shift Technology support. When this feature
is enabled, the Collaborative Processor Performance Control (CPPC) version 2 interface will
be available to control CPU P-States. The options are Disabled and Enabled.
74

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents